ics9fg107 Integrated Device Technology, ics9fg107 Datasheet - Page 15

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ics9fg107

Manufacturer Part Number
ics9fg107
Description
Programmable Ftg For Differential P4tm Cpu, Pci-express & Sata Clocks
Manufacturer
Integrated Device Technology
Datasheet
IDT
ICS9FG107
Programmable FTG for Differential P4
TM
/ICS
TM
R2a = R2b = R2
Cable connected AC coupled application, figure 4
Programmable FTG for Differential P4
Component
R5a,R5b
R6a,R6b
Cc
Vcm
Alternative termination for LVDS and other common differential signals.
Vdiff
0.45 v
0.58
0.80
0.60
R1a = R1b = R1
Figure_3.
Figure_4.
HSCL Output
Buffer
0.3
0.22v
0.28
0.40
Vp-p
Value
8.2K
1K
0.1
0.350
5%
uF
5%
volts
L4’
L4
Vcm
1.08
0.6
0.6
1.2
L1
L1’
TM
R1a
R1b
TM
R1
33
33
33
33
CPU, PCI-Express & SATA Clocks
CPU, PCI-Express & SATA Clocks
Note
L2’
L2
R2
150
78.7
78.7
174
L3’
Cc
R2a
R3
R3
100
137
none
140
Cc
R5a
L3
R6a
R2b
3.3 Volts
15
R4
100
100
100
100
R5b
R6b
L4’
L4
Standard LVDS
Note
ICS874003i-02 input compatible
REF_CLK Input
PCIe Device
R4
ICS9FG107
Figure 3.
REF_CLK Input
Down Device
REV F 08/21/07

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