ics9248-112 Integrated Device Technology, ics9248-112 Datasheet - Page 8

• Manufacturer Part Number: ics9248-112
• Description: Frequency Generator & Integrated Buffers For Celeron
• Manufacturer: Integrated Device Technology

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Group Timing Relationship Table
0326C—09/18/03
1
Absolute Maximum Ratings
T
ICS9248-112
Electrical Characteristics - Input/Supply/Common Output Parameters
Input Capacitance
SDRAM to 3V66
CPU to SDRAM
Input High Voltage
Guaranteed by design, not 100% tested in production.
Input Low Voltage
Input High Current
Input Low Current
Operating Supply
Clk Stabilization
A
Input Frequency
Pin Inductance
Transition time
CPU to 3V66
USB & DOT
Supply Current
PARAMETER
3V66 to PCI
Settling time
= 0 - 70C; Supply Voltage V
Power Down
PCI to PCI
Core Supply Voltage . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Group
Current
1
1
1
1
1
1.5-3.5ns
SYMBOL
Async
Offset
2.5ns
7.5ns
0.0ns
0.0ns
I
I
I
DD3.3OP
DD2.5OP
DD3.3PD
T
T
C
CPU 66MHz
C
V
L
C
V
I
I
STAB
I
trans
T
F
IL1
IL2
OUT
INX
IH
pin
IH
IN
IL
s
i
Tolerance
DD
V
V
V
C
C
Vdd or Gnd
V
Logic Inputs
Output pin capacitance
X1 & X2 pins
To 1st crossing of target frequency
From 1st crossing to 1% target frequency
From V
500ps
500ps
500ps
500ps
1.0ns
IN
IN
IN
L
L
DD
= 3.3 V +/-5%, V
N/A
= Max loads;Select @ 66 MHz
= Max loads; With input address to
= V
= 0 V; Inputs with no pull-up resistors
= 0 V; Inputs with pull-up resistors
= 3.3 V
DD
DD
= 3.3 V to 1% target frequency
1.5-3.5ns
Async
Offset
5.0ns
5.0ns
0.0ns
0.0ns
CONDITIONS
CPU 100MHz
DDL
8
Tolerance
= 2.5 V +/-5% (unless otherwise stated)
500ps
500ps
500ps
500ps
1.0ns
N/A
DD
1.5-3.5ns
Async
Offset
0.0ns
0.0ns
0.0ns
0.0ns
+0.5 V
CPU 133MHz
V
MIN
SS
-200
27
Tolerance
-5
-5
2
-0.3
500ps
500ps
500ps
500ps
1.0ns
N/A
14.312
TYP
300
300
11
V
MAX
DD
350
600
0.8
15
45
5
5
6
3
3
3
+0.3
UNITS
MHz
mA
mA
mA
mA
ms
ms
ms
nH
pF
pF
pF
V
V