ics9169c-271 ETC-unknow, ics9169c-271 Datasheet
ics9169c-271
Related parts for ics9169c-271
ics9169c-271 Summary of contents
Page 1
... The CPU clock makes gradual frequency transitions without violating the PLL timing of internal microprocessor clock multipliers. A raised frequency setting of 68.5MHz is available for Turbo-mode of the 66.8MHz CPU. The ICS9169C-271 contains 12 CPU clocks, 4 PCI clocks, 1 REF at 48MHz and 1 at 24MHz. The twelve CPU clock outputs provide sufficient clocks for the CPU, chip set, memory and up to two DIMM connectors (with four clocks to each DIMM) ...
Page 2
... ICS9169C-271 Pin Descriptions PIN NUMBER PIN NAME 1 VDD 4,11,20,26 GND CPU(1) 5 FS0 CPU 6,7,9,10,15,16,17,18,19 (2:5) (8:12) VDDC1 8 CPU(6) 12 FS1 CPU(7) 13 FS2 14 VDDC2 21,22,24,25,27,28 BUS (1:6) 23 VDDB 29 VDDF 30 24MHz 31 48MHz REF 32 BSEL * The internal pull up will vary from 350K to 500K based on temperature TYPE DESCRIPTION Power for device logic and crystal oscillator circuit and PWR 14 ...
Page 3
... Shared Pin Operation - Input/Output Pins Shared Pin Operation - Input/Output Pins 5, 12, 13 and 32 on the ICS9169C-271 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on these pins at this time is read and stored into a 4-bit internal data latch. At the end ...
Page 4
... ICS9169C-271 Fig. 2a Fig Fig. 2b ...
Page 5
... BUS This pin is the clock output that is intended to drive the systems plug-in card bus. The voltage swing of these ICS9169C-271 clocks is control-led by the supply that is applied to the VDD pin of the device. See the Functionality table at the beginning of this data sheet for a list of the specific frequencies that this clock operates at and the selection codes that are necessary to produce these frequencies ...
Page 6
... ICS9169C-271 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...
Page 7
... X1, X2 pins INX From V =1.6V to 1st crossing 66.6 MHz V supply ramp < 40ms DD T CPU to CPU; Load=20pF; @1.4V sk1 T BUS to BUS; Load=20pF; @1.4V sk2 CPU to BUS; Load=20pF; @1.4V T sk3 (CPU is early) CPU (@3.3V) to CPU (@2.5V) T sk4 (2.5V CPU is late) 7 ICS9169C-271 MIN TYP MAX UNITS - 0.9 1 0.8 1 1.5 2 1.4 2 ...
Page 8
... ICS9169C-271 0.818 SOIC Package Ordering Information ICS9169CM-271 ICS9169CJ-271 Example: ICS XXXX M - PPP Pattern Number ( digit number for parts with ROM code patterns) Package Type M=SOIC J=SOJ Device Type (consists digit numbers) Prefix ICS Standard Device SOJ Package ICS reserves the right to make changes in the device data identified in this publication without further notice ...