ics86953-147 Integrated Device Technology, ics86953-147 Datasheet - Page 8

• Manufacturer Part Number: ics86953-147
• Description: Lvpecl-input Lvcmos-output 1 9 175-mhz Clock Zero-delay Buffer
• Manufacturer: Integrated Device Technology

86953BYI-147
L
The schematic of the ICS86953I-147 layout example is shown in
Figure 4A. The ICS86953I-147 recommended PCB board layout
for this example is shown in Figure 4B. This layout example is
used as a general guideline. The layout in the actual system will
AYOUT
G
UIDELINE
VCC
Integrated
Circuit
Systems, Inc.
LVPECL Driv er
F
IGURE
Zo = 50 Ohm
Zo = 50 Ohm
C6 (Option)
4A. ICS86953I-147 LVCMOS Z
0.1u
R3
50
VDD
10 - 15
10u
R7
C16
R4
50
R5
50
D
www.icst.com/products/hiperclocks.html
IFFERENTIAL
0.01u
C11
R10
1K
VDD
ICS86953I-147
(U1-11)
1
2
3
4
5
6
7
8
R8
1K
U1
VDDA
FB_CLK
nc
nc
nc
nc
GND
PCLK
0.1uF
C2
R6
R9
1K
VDD
-
1K
8
TO
depend on the selected component types, the density of the
components, the density of the traces, and the stack up of the
P.C. board.
ERO
-LVCMOS / LVTTL Z
D
(U1-15)
ELAY
VDDO
VDDO
0.1uF
GND
GND
C3
Q1
Q2
Q3
Q4
B
UFFER
(U1-19)
VDD
24
23
22
21
20
19
18
17
R1
0.1uF
C4
S
R2
(U1-23)
CHEMATIC
36
36
0.1uF
C5
ICS86953I-147
Zo = 50
Zo = 50
(U1-27)
E
XAMPLE
ERO
L
0.1uF
C1
OW
D
S
ELAY
KEW
REV. B APRIL 23, 2004
, 1-
B
UFFER
TO
-9