ics86953 Integrated Device Technology, ics86953 Datasheet - Page 8

• Manufacturer Part Number: ics86953
• Description: Lvpecl-input Lvcmos-output 1 9 110-mhz Clock Zero-delay Buffer
• Manufacturer: Integrated Device Technology

L
The schematic of the ICS86953I layout example is shown in
Figure 4A. The ICS86953I recommended PCB board layout
for this example is shown in Figure 4B. This layout example is
used as a general guideline. The layout in the actual system will
86953BYI
AYOUT
G
UIDELINE
VCC
Integrated
Circuit
Systems, Inc.
LVPECL Driv er
F
IGURE
Zo = 50 Ohm
Zo = 50 Ohm
C6 (Option)
0.1u
4A. ICS86953I LVCMOS Z
R3
50
VDD
10u
10 - 15
R7
C16
R4
50
R5
50
D
www.icst.com/products/hiperclocks.html
0.01u
IFFERENTIAL
C11
R10
1K
VDD
ICS86953I
(U1-11)
1
2
3
4
5
6
7
8
R8
1K
U1
VDDA
FB_CLK
nc
nc
nc
nc
GND
PCLK
0.1uF
C2
R6
VDD
R9
1K
1K
-
ERO
8
TO
depend on the selected component types, the density of the
components, the density of the traces, and the stack up of the
P.C. board.
-LVCMOS / LVTTL Z
D
ELAY
(U1-15)
VDDO
VDDO
0.1uF
B
GND
GND
C3
Q1
Q2
Q3
Q4
UFFER
VDD
(U1-19)
24
23
22
21
20
19
18
17
R1
0.1uF
S
C4
CHEMATIC
R2
(U1-23)
36
36
0.1uF
C5
Zo = 50
Zo = 50
(U1-27)
E
XAMPLE
0.1uF
ERO
C1
L
OW
ICS86953I
D
S
ELAY
KEW
REV. B APRIL 23, 2004
, 1-
B
UFFER
TO
-9