ics8343ay-01t Integrated Device Technology, ics8343ay-01t Datasheet

no-image

ics8343ay-01t

Manufacturer Part Number
ics8343ay-01t
Description
Lvcmos-input 5v Tolerant Lvcmos-output 1 16 200mhz Clock Buffer
Manufacturer
Integrated Device Technology
Datasheet
1.ICS8343AY-01T.pdf (11 pages)
G
LVTTL input levels. The ICS8343I-01 operates at 3.3V,
2.5V and mixed 3.3V input and 2.5V supply modes over the
commercial temperature range. Guaranteed output and part-
to-part skew characteristics make the ICS8343I-01 ideal for
those clock distribution applications demanding well defined
performance and repeatability.
B
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
8343AYI-01
HiPerClockS™
ICS
LOCK
ENERAL
CLK
CLK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D
The ICS8343I-01 is a low skew, 1-to-16
LVCMOS/LVTTL Fanout Buffer and a member of
the HiPerClockS™ family of High Performance
Clock Solutions from ICS. The ICS8343I-01
single ended clock input accepts LVCMOS or
IAGRAM
Integrated
Circuit
Systems, Inc.
D
VDD1
V
OE1
OE1
ESCRIPTION
DD1
VDD
V
DD
GND
GND
VDD2
V
OE2
OE2
DD2
www.icst.com/products/hiperclocks.html
PRELIMINARY
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
1
P
F
• 16 LVCMOS/LVTTL outputs
• 1 LVCMOS/LVTTL clock input
• CLK can accept the following input levels: LVCMOS, LVTTL
• Maximum output frequency: 200MHz
• Dual output enable inputs facilitates 1-to-16 or 1-to-8 input
• All inputs are 5V tolerant
• Output skew: 250ps (typical)
• Part-to-part skew: 700ps (typical)
• Full 3.3V and 2.5V or mixed 3.3V core/2.5V operating supply
• -40°C to 85°C ambient operating temperature
to output modes
IN
EATURES
A
V
V
V
GND
GND
GND
DD
DD
DD
LVCMOS / LVTTL F
SSIGNMENT
Q3
Q4
1
1
1
7mm x 7mm x 1.4mm body package
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
ICS8343I-01
32-Lead LQFP
Y Package
(Top View)
L
ICS8343I-01
OW
S
ANOUT
KEW
24
23
22
21
20
19
18
17
REV. A JUNE 22, 2004
, 1-
V
V
V
Q12
Q11
GND
GND
GND
DD
DD
DD
B
2
2
2
TO
UFFER
-16

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ics8343ay-01t Summary of contents

Page 1

Integrated Circuit Systems, Inc ENERAL ESCRIPTION The ICS8343I- low skew, 1-to-16 ICS LVCMOS/LVTTL Fanout Buffer and a member of HiPerClockS™ the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8343I-01 single ended clock input ...

Page 2

Integrated Circuit Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs Package Thermal Impedance, θ JA Storage Temperature, T STG T 4A ABLE OWER UPPLY HARACTERISTICS S ...

Page 4

Integrated Circuit Systems, Inc ABLE OWER UPPLY HARACTERISTICS ...

Page 5

Integrated Circuit Systems, Inc ABLE OWER UPPLY HARACTERISTICS ...

Page 6

Integrated Circuit Systems, Inc ABLE HARACTERISTICS ...

Page 7

Integrated Circuit Systems, Inc. P ARAMETER 1.65V± DDx LVCMOS GND -1.65V± ORE UTPUT OAD 1.25V± DDx LVCMOS GND -1.25V±5% 2. 2.5V O ...

Page 8

Integrated Circuit Systems, Inc. V DDx 2 CLK V DDx 2 Q0:Q15 ROPAGATION ELAY 8343AYI-01 PRELIMINARY LVCMOS / LVTTL F Q0:Q15 UTPUT UTY YCLE www.icst.com/products/hiperclocks.html 8 ICS8343I- KEW ...

Page 9

Integrated Circuit Systems, Inc. θ ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data ...

Page 10

Integrated Circuit Systems, Inc ACKAGE UTLINE UFFIX FOR ABLE ...

Page 11

Integrated Circuit Systems, Inc ABLE RDERING NFORMATION ...

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