ics87931i-147 Integrated Device Technology, ics87931i-147 Datasheet - Page 10

• Manufacturer Part Number: ics87931i-147
• Description: Low Skew, 1-to-6 Lvcmos/lvttl Clock Multiplier/zero Delay Buffer
• Manufacturer: Integrated Device Technology

S
Figure 4A shows a schematic example of using an ICS87931I-
147. It is recommended to have one decouple capacitor per
power pin. Each decoupling capacitor should be located as
IDT
CHEMATIC
ICS87931I-147
LOW SKEW, 1-TO-6 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
™
/ ICS
Logic Input Pin Examples
VDD
™
LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
RU1
1K
RD1
Not Install
E
Set Logic
Input to
'1'
XAMPLE
To Logic
Input
pins
3.3V
3.3V PECL Driv er
VDD
RU2
Not Install
RD2
1K
Zo = 50 Ohm
Zo = 50 Ohm
Set Logic
Input to
'0'
To Logic
Input
pins
VDD
10 - 15
10u
R7
C16
F
IGURE
VDD=3.3V
SP = Space (i.e. not intstalled)
POWER_DN
R8
50
0.01u
R10
50
C11
4A. ICS87931I-147 S
R9
50
ICS87931I
ICS87931I-147
1
2
3
4
5
6
7
8
U1
nc
VDDA
POWER_DN
CLK1
nMR
CLK0
nCLK0
GND
10
close as possible to the power pin. The low pass filter R7, C11
and C16 for clean analog supply should also be located as
close to the V
CHEMATIC
EXTFB_SEL
(U1-13)
CLK_SEL
PLL_SEL
VDDO
GND
QB0
QB1
VDD
0.1uF
nc
C1
E
DDA
XAMPLE
24
23
22
21
20
19
18
17
pin as possible.
VDD
R1
R2
ICS87931AYI-147 REV. A MARCH 29, 2007
43
(U1-21)
43
0.1uF
C2
R3
1K
R5
1K
Zo = 50
VDD
Zo = 50
(U1-28)
R4
1K
0.1uF
C3
Receiv er
Receiv er