ad7523kn Intersil Corporation, ad7523kn Datasheet - Page 4

• Manufacturer Part Number: ad7523kn
• Description: 8-bit, Multiplying D/a Converters
• Manufacturer: Intersil Corporation

Detailed Description
The AD7523 and AD7533 are monolithic multiplying D/A
converters. A highly stable thin film R-2R resistor ladder
network and NMOS SPDT switches form the basis of the
converter circuit, CMOS level shifters permit low power
TTL/CMOS compatible operation. An external voltage or
current reference and an operational amplifier are all that is
required for most voltage output applications.
A simplified equivalent circuit of the DAC is shown in the
Functional Diagram. The NMOS SPDT switches steer the
ladder leg currents between I
must be held at ground potential. This configuration main-
tains a constant current in each ladder leg independent of
the input code.
Converter errors are further reduced by using separate
metal interconnections between the major bits and the out-
puts. Use of high threshold switches reduce offset (leakage)
errors to a negligible level.
The level shifter circuits are comprised of three inverters with
positive feedback from the output of the second to the first,
see Figure 1. This configuration results in TTL/CMOS
compatible operation over the full military temperature
range. With the ladder SPDT switches driven by the level
shifter, each switch is binarily weighted for an ON resistance
proportional to the respective ladder leg current. This
assures a constant voltage drop across each switch,
creating equipotential terminations for the 2R ladder
resistors and high accurate leg currents.
Typical Applications
Unipolar Binary Operation - AD7523 (8-Bit DAC)
The circuit configuration for operating the AD7523 in
unipolar mode is shown in Figure 2. With positive and
negative V
multiplication. The “Digital Input Code/Analog Output Value”
table for unipolar mode is given in Table 1.
CMOS INPUT
TTL/
V+
REF
values the circuit is capable of 2-Quadrant
FIGURE 1. CMOS SWITCH
1 3
2
OUT1
and I
4
5
OUT2
6
7
I
TO LADDER
OUT2
buses which
AD7523, AD7533
8
I
OUT1
9
10-11
NOTES:
NOTE:
Zero Offset Adjustment
Gain Adjustment
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
1. Connect all digital inputs to V+.
2. Monitor V
3. To increase V
4. To decrease V
1. R1 and R2 used only if gain adjustment is required.
2. CF1 protects AD7523 and AD7533 against negative transients.
1.
INPUTS
DATA
operational amplifier for 0V 1mV (Max) at V
250 ) in the I
250 ) between the reference voltage and the V
terminal.
1 LSB
DIGITAL INPUT
TABLE 1. UNlPOLAR BINARY CODE - AD7523
MSB LSB
FIGURE 2. UNIPOLAR BINARY OPERATION
11111111
10000001
10000000
01111111
00000001
00000000
MSB
=
LSB
OUT
2
–
V
8
REF
4
11
OUT
OUT1
GND
OUT
AD7523/
for a -V
AD7533
V
10V
REF
15
, connect a series resistor, R2, (0 to
3
, connect a series resistor, R1, (0 to
amplifier feedback loop.
+15V
14
REF
=
16
1
2
--------- - V
256
–
–
–
–
R
OUT1
OUT2
1
–
(1
V REF
V REF
V REF
V REF
–
FEEDBACK
V REF
V REF
1
/
2
ANALOG OUTPUT
REF
8
) reading.
255
--------- -
256
129
--------- -
256
127
--------- -
256
--------- -
256
CR1
--------- -
256
1
128
--------- -
256
0
.
=
=
6
+
-
0
–
R2
V REF
---------------- -
OUT
2
.
V
OUT
REF