s29jl064j Meet Spansion Inc., s29jl064j Datasheet - Page 59

• Manufacturer Part Number: s29jl064j
• Description: 64 Megabit 8m X 8-bit/4m X 16-bit Cmos 3.0 Volt-only, Simultaneous Read/write Flash Memory
• Manufacturer: Meet Spansion Inc.

21. Revision History
April 7, 2011 S29JL064J_00_03
Revision 01 (June 21, 2010)
Revision 02 (September 1, 2010)
Global
Simultaneous Read/Write Operations
with Zero Latency
Ordering Information
Device Bus Operation
RESET#: Hardware Reset Pin
Secured Silicon Region
Common Flash Memory Interface (CFI)
Enter Secured Silicon Region/Exit
Secured Silicon Region Command
Sequence
Erase Suspend/Erase Resume
Commands
Erase and Programming Performance
Pin Capacitance
Physical Dimensions
Revision 03 (April 7, 2011)
Global
RESET#: Hardware Reset Pin
Reset Command
Absolute Maximum Ratings
DC Characteristics
Test Conditions
Hardware Reset (RESET#)
Section
Initial revision
Updated the data sheet designation from Advanced Information to Preliminary.
Corrected spelling, capitalization, and grammatical errors.
Added clarification that JL064J is only offered as a dual boot device with both top and bottom boot
sectors.
Clarified that Note 1 applies to the Packing Type column.
The note for the Addresses column should be Note 1, not Note 2.
Changed “Refer to AC Characteristics on page 46” to “Refer to Hardware Reset (RESET#) on page
47”.
Clarified the Secured Silicon Indicator Bit data based on factory and customer lock status.
Removed forward looking statements regarding factory locking features as they are supported in
this device.
Clarified that once in the CFI query mode, the system must write the reset command to return to
reading array data.
Removed the incorrect generalizing statement that the Secured Silicon Region always contains an
ESN.
Added clarification that “It is not recommended to program the Secured Silicon Region after an
erase suspend, as proper device functionality cannot be guaranteed.”
In Table 10.1, corrected the Secured Silicon Region Factory Protect fourth cycle data from 81/01 to
81/41/01.
Added Note 5 regarding minimum program and erase cycle endurance.
Changed section title from “TSOP Pin Capacitance” to “Pin Capacitance”.
Updated values to reflect maximum capacitances for both TSOP and BGA.
Removed typical capacitance values.
Added specific pin clarifications to parameter descriptions.
Updated the VBK048 package outline drawing.
Updated the data sheet designation from Preliminary to Full Production (no designation on
document).
Added warning that keeping CE# at V
erroneuous data on the first read.
Clarified that during an embedded program or erase, if DQ5 goes high then RY/BY# will remain low
until a reset is issued
Corrected the maximum value of WP#/ACC voltage with respect to ground from +10.5V to +9.5V
Corrected voltage for autoselect and temporary sector unprotect (V
8.5V
Changed the format of the input pulse levels and input and output timing measurement reference
levels to match the JL032J data sheet format
Added note to “Reset Timings” figure clarifying that CE# should only go low after RESET# has gone
high.
D a t a
S h e e t
S29JL064J
IL
from power up through the first reset could cause
Description
ID
) minimum value from 11.5V to
59