s29jl032j Meet Spansion Inc., s29jl032j Datasheet - Page 31

• Manufacturer Part Number: s29jl032j
• Description: 32megabit 4m X 8-bit/2m X 16-bit Cmos 3.0volt-only, Simultaneous Read/write Flash Memory
• Manufacturer: Meet Spansion Inc.

10. Command Definitions
10.1
10.2
January 27, 2010 S29JL032J_00_01
Reading Array Data
Reset Command
Writing specific address and data commands or sequences into the command register initiates device
operations.
and data values or writing them in the improper sequence may place the device in an unknown state. A
hardware reset may be required to return the device to reading array data.
All addresses are latched on the falling edge of WE# or CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens first. Refer to
diagrams.
The device is automatically set to reading array data after device power-up. No commands are required to
retrieve data. Each bank is ready to read array data after completing an Embedded Program or Embedded
Erase algorithm.
After the device accepts an Erase Suspend command, the corresponding bank enters the erase-suspend-
read mode, after which the system can read data from any non-erase-suspended sector within the same
bank. The system can read array data using the standard read timing, except that if it reads at an address
within erase-suspended sectors, the device outputs status data. After completing a programming operation in
the Erase Suspend mode, the system may once again read array data with the same exception. See
Suspend/Erase Resume Commands on page 36
The system must issue the reset command to return a bank to the read (or erase-suspend-read) mode if DQ5
goes high during an active program or erase operation, or if the bank is in the autoselect mode. See
Command on page
See also
on page 47
Writing the reset command resets the banks to the read or erase-suspend-read mode.
The reset command may be written between the sequence cycles in an erase command sequence before
erasing begins. This resets the bank to which the system was writing to the read mode. Once erasure begins,
however, the device ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in a program command sequence before
programming begins. This resets the bank to which the system was writing to the read mode. If the program
command sequence is written to a bank that is in the Erase Suspend mode, writing the reset command
returns that bank to the erase-suspend-read mode. Once programming begins, however, the device ignores
reset commands until the operation is complete.
The reset command may be written between the sequence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command must be written to return to the read mode. If a bank
entered the autoselect mode while in the Erase Suspend mode, writing the reset command returns that bank
to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation, writing the reset command returns the banks to the
read mode (or erase-suspend-read mode if that bank was in Erase Suspend).
D a t a
Requirements for Reading Array Data on page 14
Table 10.1 on page 37
provides the read parameters, and
S h e e t
31, for more information.
( A d v a n c e
defines the valid register command sequences. Writing incorrect address
S29JL032J
I n f o r m a t i o n )
Figure 17.1 on page 47
for more information.
for more information.
AC Characteristics on page 47
shows the timing diagram.
Read-Only Operations
for timing
Reset
Erase
31