s29cd-j Meet Spansion Inc., s29cd-j Datasheet - Page 64

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s29cd-j

Manufacturer Part Number
s29cd-j
Description
32/16 Megabit Cmos 2.6 Volt Or 3.3 Volt-only Simultaneous Read/write, Dual Boot, Burst Mode Flash Memory With Versatilei/o?
Manufacturer
Meet Spansion Inc.
Datasheet
Note
The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector.
Notes
1. The timings are similar to synchronous read timings and asynchronous data polling Timings/Toggle bit Timing.
2. VA = Valid Address. Two read cycles are required to determine status. When the Embedded Algorithm operation is complete, the toggle bits will stop toggling.
3. RDY is active with data (A18 = 0 in the Configuration Register). When A18 = 1 in the Configuration Register, RDY is active one clock cycle before data.
4. Data polling requires burst access time delay.
64
Addresses
ADV#
Data
OE#
RDY
CE#
CLK
WE#
DQ6
DQ2
Enter Embedded
Erasing
V A
Figure 18.14 Synchronous Data Polling Timing/Toggle Bit Timings
Erase
Figure 18.13 DQ2 vs. DQ6 for Erase/Erase Suspend Operations
Suspend
Erase
t
OE
Erase Suspend
Read
S29CD-J & S29CL-J Flash Family
D a t a
Status Data
Suspend Program
Enter Erase
S h e e t
Erase Suspend
Program
( P r e l i m i n a r y )
V A
Erase Suspend
Read
S29CD-J_CL-J_00_B2 March 7, 2007
t
OE
Resume
Erase
Erase
Status Data
Complete
Erase

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