nt1gt72u89d0by Nanya Techology, nt1gt72u89d0by Datasheet - Page 15

• Manufacturer Part Number: nt1gt72u89d0by
• Description: 240pin Unbuffered Ddr2 Sdram Module With Ecc Based On 128mx8 Ddr2 Sdram D-die
• Manufacturer: Nanya Techology

NT1GT72U89D0BY / NT2GT72U8PD0BY
1GB: 128M x 72 / 2GB: 256M x 72
Unbuffered DDR2 SDRAM DIMM with ECC
(T
REV 1.0
03/2008
AC Timing Specifications for DDR2 SDRAM Devices Used on Module
CASE
t
t
Symbol
DQSL,(H)
t
LZ(DQS)
t
t
t
DQSCK
t
t
t
t
t
t
t
LZ(DQ)
WPRE
t
DQSS
t
WPST
DQSQ
t
t
t
t
t
XSNR
XSRD
t
RPRE
RPST
t
t
t
DIPW
t
WTR
t
t
WL
DSH
t
t
t
t
QHS
t
RRD
FAW
CCD
CKE
t
t
DSS
IPW
t
DAL
RTP
t
WR
t
CK
CH
DS
DH
AC
HZ
HP
QH
XP
= 0 °C ~ 85 °C; V
CL
IH
IS
Write recovery time without Auto-Precharge
Auto precharge write recovery + precharge time
Internal write to read command delay
Internal read to precharge command delay
CKE minimum pulse width
Exit self refresh to a Non-read command
Exit self refresh to a Read command
Exit precharge power down to any Non- read
command
Clock Cycle Time (Average)
CK high-level width (Average)
CK low-level width (Average)
Write command to DQS associated clock edge
Write command to 1st DQS latching transition
DQS falling edge to CK setup time
(write cycle)
DQS falling edge hold time from CK
(write cycle)
DQS input low (high) pulse width
(write cycle)
Write preamble
Write postamble
Address and control input setup time
Address and control input hold time
Input pulse width
DQ and DM input setup time(differential data
strobe)
DQ and DM input hold time(differential data strobe)
DQ and DM input pulse width (each input)
DQ output access time from CK/
DQS output access time from CK/
Data-out high-impedance time from CK/
DQS low-impedance time from CK/
DQ low-impedance time from CK/
DQS-DQ skew (DQS & associated DQ signals)
Minimum half clk period for any given cycle;
defined by clk high (t
Data hold Skew Factor
Data output hold time from DQS
Read preamble
Read postamble
Active bank A to Active bank B command
Four Activate Window for 1KB page size products
 to 
DDQ
= 1.8V ± 0.1V; V
Parameter
CH)
or clk low (t
DD
= 1.8V ± 0.1V, See AC Characteristics) (Part 1 of 2)
CL
) time
Min(t
15
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
t
WR+tnRP
2t
HP
t
t
RFC
AC
L(abs)
-0.25
3000
AC
0.48
0.48
0.35
0.35
0.35
-450
-400
37.5
Min.
CH(abs),
200
275
100
175
200
0.2
0.2
0.4
0.6
0.9
0.4
7.5
7.5
7.5
15
- t
2
3
2
-
-
-
min
+10
min
QHS
PC2-5300
)
RL-1
t
C
t
t
t
AC
AC
AC
Max.
8000
0.52
0.52
0.25
450
400
240
340
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
max
max
max
Min(t
WR+tnRP
t
2t
HP
t
t
RFC
CL(abs)
t
2500
-0.25
ACmin
AC
0.48
0.48
0.35
0.35
0.35
-400
-350
Min.
175
250
125
200
0.2
0.2
0.4
0.6
0.9
0.4
7.5
7.5
7.5
50
CH(abs),
- t
35
15
2
3
2
-
-
-
+10
min
QHS
PC2-6400
)
RL-1
© NANYA TECHNOLOGY CORP.
t
t
t
AC
ACmax
ACmax
Max.
8000
0.52
0.52
0.25
400
350
200
300
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
max
nCK
nCK
nCK
nCK
nCK
nCK
Unit
t
t
t
t
t
t
t
t
t
t
t
t
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK