ltc6802-2 Linear Technology Corporation, ltc6802-2 Datasheet

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ltc6802-2

Manufacturer Part Number
ltc6802-2
Description
Multicell Addressable Battery Stack Monitor
Manufacturer
Linear Technology Corporation
Datasheet
APPLICATIONS
TYPICAL APPLICATION
FEATURES
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BATTERY
12-CELL
Measures up to 12 Li-Ion Cells in Series (60V Max)
Stackable Architecture Enables Monitoring High
Voltage Battery Stacks
Individually Addressable with 4-Bit Address
0.25% Maximum Total Measurement Error
13ms to Measure All Cells in a System
Cell Balancing:
Two Thermistor Inputs Plus On-board
Temperature Sensor
1MHz Serial Interface with Packet Error Checking
High EMI Immunity
Delta Sigma Converter With Built In Noise Filter
Open Wire Connection Fault Detection
Low Power Modes
44-Lead SSOP Package
Electric and Hybrid Electric Vehicles
High Power Portable Equipment
Backup Battery Systems
High Voltage Data Acquisition Systems
STRING
On-Chip Passive Cell Balancing Switches
Provision for Off-Chip Passive Balancing
NEXT 12-CELL
NEXT 12-CELL
PACK BELOW
PACK ABOVE
100k NTC
V
V
+
MUX
EXTERNAL
TEMP
100k
REFERENCE
REGISTERS
DIE TEMP
CONTROL
Δ∑ ADC
VOLTAGE
12-BIT
AND
LTC6802-2
68022 TA01a
SERIAL DATA
4-BIT
ADDRESS
DESCRIPTION
The LTC
includes a 12-bit ADC, a precision voltage reference, a
high voltage input multiplexer and a serial interface. Each
LTC6802-2 can measure 12 series connected battery cells,
with a total input voltage up to 60V. The voltage on all 12
input channels can be measured within 13ms.
Many LTC6802-2 devices can be stacked to measure the
voltage of each cell in a long battery string. Each LTC6802-2
has an individually addressable serial interface, allowing
up to 16 LTC6802-2 devices to interface to one control
processor and operate simultaneously.
To minimize power, the LTC6802-2 offers a measure mode
to monitor each cell for overvoltage and undervoltage
conditions. A standby mode is also provided to reduce
supply current to 50μA.
Each cell input has an associated MOSFET switch that can
discharge any overcharged cell.
The related LTC6802-1 offers a serial interface that allows
the serial ports of multiple LTC6802-1 devices to be daisy
chained without opto-couplers or isolators.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
®
6802-2 is a complete battery monitoring IC that
Battery Stack Monitor
Multicell Addressable
–0.05
–0.10
–0.15
–0.20
–0.25
–0.30
0.30
0.25
0.20
0.15
0.10
0.05
0
–50
7 REPRESENTATIVE UNITS
V
CELL VOLTAGE 3.6V
S
= 43.2V
Measurement Error Over
–25
Extended Temperature
0
TEMPERATURE (°C)
25
LTC6802-2
50
75
100
68022 TA01b
125
68022f
1

Related parts for ltc6802-2

ltc6802-2 Summary of contents

Page 1

... The voltage on all 12 input channels can be measured within 13ms. Many LTC6802-2 devices can be stacked to measure the voltage of each cell in a long battery string. Each LTC6802-2 has an individually addressable serial interface, allowing LTC6802-2 devices to interface to one control processor and operate simultaneously ...

Page 2

... LTC6802-2 ABSOLUTE MAXIMUM RATINGS (Note 1) + – Total Supply Voltage ( .................................60V – Input Voltage (Relative ............................................................ –0. C12 ..........................................V Cn (Note 5) ......................... –0.3V to min (9 • n, 60V) Sn (Note 5) ......................... –0.3V to min (9 • n, 60V) CSBO, SCKO, SDOI ..................V All other pins ........................................... –0. Voltage Between Inputs Cn to Cn-1 ............................................... – ...

Page 3

... Average Current Into the V Pin While Monitoring for UV and OV Conditions Continuous Monitoring Monitor Every 130ms Monitor Every 500ms Monitor Every 2s + Current into the V Pin When Idle All Serial Port Pins at Logic ‘1’ V > 3V (Note 3) CELL LTC6802-2 MIN TYP MAX UNITS l 1.5 mV/Bit l –0.5 0.5 mV –0.12 0.12 ...

Page 4

... LTC6802-2 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are at T SYMBOL PARAMETER Temperature Range Thermal Shutdown Temperature Thermal Shutdown Hysteresis Timing Specifi cations t Measurement Cycle Time CYCLE t SDI Valid to SCKI Rising Setup 1 t SDI Valid to SCKI Rising Hold 2 t SCKI Low ...

Page 5

... FREQUENCY (Hz) ADC DNL 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 INPUT (V) LTC6802-2 Measurement Gain Error Hysteresis 85°C TO 25° –250 –200 –150 –100 –50 0 4.5 5.0 CHANGE IN GAIN ERROR (ppm) 68022 G10 ADC Normal Mode Rejection vs ...

Page 6

... LTC6802-2 TYPICAL PERFORMANCE CHARACTERISTICS Cell Input Bias Current During Conversion 2.70 CELL INPUT = 3.6V 2.65 2.60 2.55 2.50 2.45 2.40 2.35 –40 – 100 120 TEMPERATURE (°C) 68022 G04 Internal Die Temperature Measurement vs Ambient Temperature 43. –1 –2 –3 DEVICE IN STANDBY PRIOR TO MAKING DIE MEASUREMENTS – ...

Page 7

... CDC = 2 5 REG 68022 G17 13.20 13.15 13.10 13.05 13.00 6 CELLS DISCHARGING 12.95 1 CELL 12.90 DISCHARGING 12.85 12. 68022 G18 LTC6802-2 Internal Discharge Resistance vs Cell Voltage T = –45° 25° 85° 105° 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 CELL VOLTAGE (V) 68022 G11 Cell Conversion Time –40 – ...

Page 8

... NMOSFET pulls pin – “1” is written to register bit GPIO1, the pin REF – . Larger loads – for the LTC6802-2. The state of the TOS pin – ), the LTC6802-2 goes . REG pin can is REG – ...

Page 9

... Either a “1” “0” is read back, depending on the voltage present at pin 38. The GPIOs makes it possible to turn on/off circuitry around the LTC6802-2, or read logic values from a circuit around the LTC6802-2. When the MMB pin is low, the GPIO pins and the WDTB pin are treated as inputs that set the number of cells to be monitored ...

Page 10

... A unique addressing scheme allows all LTC6802-2s to connect to the same serial port of the host processor. Further explanation of the LTC6802-2 can be found in the Serial Port section of the data sheet. The LTC6802-2 also contains circuitry to balance cell volt- ages ...

Page 11

... V2 V1 OE2 OE1 MPU MISO CS MOSI CLK – – DIGITAL ISOLATOR 68022 F01 LTC6802-2 – LTC6802-2 OE2 OE1 CSBI SDO SDI SCKI – ADDRESS DIGITAL A1 ISOLATOR A0 GPIO2 GPIO1 WDTB MMB TOS V REG ...

Page 12

... Use the STCVDC command for all cell voltages (com- mand 0x60) with only one discharge switch time. The value returned for the cell directly below the LTC6802-2 cell being discharged will be invalid and read close to 0V. The voltage reading of all other cells, including the cell being discharged, will be valid ...

Page 13

... Figure 4. External Discharge FET Connection (One Cell Shown) APPLICATIONS INFORMATION USING THE LTC6802-2 WITH LESS THAN 12 CELLS The LTC6802-2 can be used with as few as 4 cells. The minimum number of cells is governed by the supply voltage requirements of the LTC6802-2. The sum of the cell voltages must be 10V to guarantee that all electrical specifi ...

Page 14

... By writing a GPIO confi guration register bit to a logic low, the open drain output can be activated. The GPIOs give the user the ability to turn on/off circuitry around the LTC6802-2. One example might be a circuit to verify the operation of the system. When a GPIO confi guration bit is written to a logic high, the corresponding GPIO pin may be used as an input ...

Page 15

... To exit standby mode, the CDC bits must be written to a value other than 0. Measure Mode The LTC6802 measure mode when the CDC bits are programmed with a value from The IC monitors each cell voltage and produces an interrupt signal on the SDO pin indicating all cell voltages are within the UV and OV limits ...

Page 16

... Multiple devices are uniquely identifi part address determined by the pins. Physical Layer On the LTC6802-2, four pins comprise the serial interface: CSBI, SCKI, SDI and SDO. The SDO and SDI may be tied together, if desired, to form a single, bi-directional port. Four address pins (A0 to A3) set the part address for ad- dress commands ...

Page 17

... PEC, MSB fi rst. Toggle Polling: Toggle polling allows a robust determina- tion both of device states and of the integrity of the con- nections between the devices in a stack. Toggle polling LTC6802-2 LSB (DATA) MSB (DATA) 68022 F07 68022 F08 ...

Page 18

... LTC6802-2 APPLICATIONS INFORMATION is enabled when the LVLPL bit is low. After entering a polling command, the data out line will be driven by the slave devices based on their status. When polling for the A/D converter status, data out will be low when any device is busy performing an A/D conversion and will toggle at 1kHz when no device is busy ...

Page 19

... Data Byte High PEC 8 8 Data Byte High Shift Byte 1 Poll Data 8 8 Data Byte Low … Data Byte High 8 8 Data Byte Low … Data Byte High LTC6802 Shift Byte 1 … Shift Byte N 8 … Shift Byte N 8 PEC 19 68022f ...

Page 20

... LTC6802-2 APPLICATIONS INFORMATION Commands Table 9. Command Codes Write Confi guration Register Group Read Confi guration Register Group Read Cell Voltage Register Group Read Flag Register Group Read Temperature Register Group Start Cell Voltage A/D Conversions and Poll Status Start Open Wire A/D Conversions and Poll Status ...

Page 21

... APPLICATIONS INFORMATION Memory Map Table 10 through Table 15 show the memory map for the LTC6802-2. Table 15 gives bit descriptions. Table 10. Confi guration (CFG) Register Group REGISTER RD/WR BIT 7 CFGR0 RD/WR WDTEN CFGR1 RD/WR DCC8 CFGR2 RD/WR MC4I CFGR3 RD/WR MC12I CFGR4 RD/WR VUV[7] CFGR5 RD/WR VOV[7] Table 11. Cell Voltage (CV) Register Group ...

Page 22

... LTC6802-2 APPLICATIONS INFORMATION Table 12. Flag (FLG) Register Group REGISTER RD/WR BIT 7 FLGR0 RD C4OV FLGR1 RD C8OV FLGR2 RD C12OV* * Bits C11UV, C12UV, C11OV, and C12OV are always low if the CELL10 bit in register CFGR0 is high Table 13. Temperature (TMP) Register Group REGISTER RD/WR BIT 7 TMPR0 RD ETMP1[7] TMPR1 ...

Page 23

... Temperature measurement voltage = ETMPx * 1.5mV 0= thermal shutdown has not occurred; 1=thermal shutdown has occurred Status cleared to ‘0’ on read of Thermal Register Group Device revision code Temperature measurement voltage = ITMP * 1.5mV = 8mV * T(°K) CRC value for reads LTC6802-2 POWERED DOWN CELL VOLTAGE REF MEASUREMENT TIME Yes ...

Page 24

... LTC6802-2 APPLICATIONS INFORMATION SERIAL COMMAND Example for LTC6802-2 (Addressable Confi guration) Examples below use a confi guration of three stacked devices: bottom (B), middle (M), and top (T) Write Confi guration Registers (Broadcast Command) 1. Pull CSBI low 2. Send WRCFG command byte 3. Send CFGR0 byte, then CFGR1, CFGR2, … CFGR5 (All devices on bus receive same data) 4. Pull CSBI high ...

Page 25

... If the watchdog timer is enabled, the device will enter standby mode within 2 seconds of disconnect. Discharge switches are disabled in standby mode. Use digital isolators to isolate the LTC6802-2 serial port from other LTC6802-2 serial ports. Add parallel Schottky diodes across each cell for load-path redundancy ...

Page 26

... LTC6802-2 APPLICATIONS INFORMATION Internal Protection Diodes Each pin of the LTC6802-2 has protection diodes to help prevent damage to the internal device structures caused by external application of voltages beyond the supply rails as shown in Figure 9. The diodes shown are conventional silicon diodes with a forward breakdown voltage of 0.5V. The unlabeled zener ...

Page 27

... CELL1. READING EXTERNAL TEMPERATURE PROBES Using Dedicated Inputs The LTC6802-2 includes two channels of ADC input, V and V , that are intended to monitor thermistors TEMP2 (tempco about –4%/°C generally) or diodes (–2.2mV/°C typical) located within the cell array ...

Page 28

... LT1461A-4 or LTC6652A-4.096. By periodic read- ings of this signal, host software can provide correction of the LTC6802-2 readings to improve the accuracy over that of the internal LTC6802-2 reference, and/or validate ADC operation. Another useful signal is a measure of the total stack potential ...

Page 29

... The pinout of the LTC6802-2 was chosen to facilitate this physical separation. Figure 17 shows the DC voltage on each pin with respect to V battery cells are connected to the LTC6802-2. There is no more then 5.5V between any two adjacent pins. The pack- age body is used to separate the highest voltage (43.5V) from the lowest voltage (0V) ...

Page 30

... Thus if an analog fi lter is placed in front of a SAR converter to achieve the same noise rejection as the LTC6802-2 ADC, the SAR will have a slower response to input signals. For example, a step input applied to the input of the 850Hz fi lter will take 1 ...

Page 31

... APPLICATIONS INFORMATION LTC6802-2 ADC settles in a single 1ms conversion cycle. This also means that very high sample rates do not provide any additional information because the analog fi lter limits the frequency response. While higher order active fi lters may provide some im- provement, their complexity makes them impractical for high-channel count measurements as a single fi ...

Page 32

... V V REG 100Ω 2.2k 2.2k SDI SCKI CSBI SDO R12 2.2k − V COMMENTS Functionality equivalent to LTC6802-2, Allows for Multiple Devices to be Daisy Chained www.linear.com ● 2.2k ALL NPN: CMPT8099 ALL PNP: CMPT8599 ALL PN: RS07J ALL SCHOTTKY: CMD5H2-3 2.2k 2. HOST μP 500kbps MAX DATA RATE ...

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