ltc693csw-trpbf Linear Technology Corporation, ltc693csw-trpbf Datasheet - Page 14

• Manufacturer Part Number: ltc693csw-trpbf
• Description: Microprocessor Supervisory Circuits
• Manufacturer: Linear Technology Corporation

LTC692/LTC693
Example 2: The circuit in Figure 9 can be used to measure
the regulated 5V supply to provide early warning of power
failure. Because of variations in the PFI threshold, this
circuit requires adjustment to ensure the PFI comparator
trips before the reset threshold is reached. Adjust R5 such
that the PFO output goes low when the V
the desired level (e.g., 4.6V).
Monitoring the Status of the Battery
C3 can also monitor the status of the memory backup
battery (Figure 10). If desired, the CE OUT can be used to
apply a test load to the battery. Since CE OUT is forced high
in battery backup mode, the test load will not be applied
to the battery while it is in use, even if the microprocessor
is not powered.
APPLICATIONS INFORMATION
14
Figure 10. Backup Battery Monitor with Optional Test Load
3V
OPTIONAL TEST LOAD
RESET
R1
1M
R2
1M
WDO
20K
V
WDI
R
CC
L
= 5V
V
PFI
CE OUT
BATT
LTC693
V
5V
CC
GND
CE IN
PFO
t
Figure 11. Watchdog Time-Out Period and Reset Active Time
1
692_3 • F10
CC
LOW-BATTERY SIGNAL
TO μP I/O PIN
I/O PIN
supply reaches
t
2
t
t
t
1
2
3
t
1
= RESET ACTIVE TIME
= NORMAL WATCHDOG TIME-OUT PERIOD
= WATCHDOG TIME-OUT PERIOD IMMEDIATELY
AFTER A RESET
Watchdog Timer
The LTC692/LTC693 provide a watchdog timer function to
monitor the activity of the microprocessor. If the micropro-
cessor does not toggle the watchdog input (WDI) within
a seleced time-out period, RESET is forced to active low
for a minimum of 140ms. The reset active time is adjust-
able on the LTC693. Since many systems cannot service
the watchdog timer immediately after a reset, the LTC693
has longer time-out period (1.0 second minimum) right
after a reset is issued. The normal time-out period (70ms
minimum) becomes effective following the fi rst transition
of WDI after RESET is inactive. The watchdog time-out
period is fi xed at a 1.0 second minimum on the LTC692.
Figure 11 shows the timing diagram of watchdog time-out
period and reset active time. The watchdog time-out period
is restarted as soon as RESET is inactive. When either a
high-to-low or low-to-high transition occurs at the WDI pin
prior to time-out, the watchdog timer is reset and begins
to time-out again. To ensure the watchdog timer does not
time-out, either a high-to-low or low-to-high transition
on the WDI pin must occur at or less than the minimum
time-out period. If the input to the WDI pin remains either
high or low, reset pulses will be issued every 1.6 seconds
typically. The watchdog timer can be deactivated by fl oat-
ing the WDI pin. The timer is also disabled when V
below the reset voltage threshold or V
t
3
692_3 • F11
BATT
.
CC
falls
0692fa