ltc485cs8-trpbf Linear Technology Corporation, ltc485cs8-trpbf Datasheet - Page 5
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ltc485cs8-trpbf
Manufacturer Part Number
ltc485cs8-trpbf
Description
Low Power Rs485 Interface Transceiver
Manufacturer
Linear Technology Corporation
Datasheet
1.LTC485CS8-TRPBF.pdf
(12 pages)
PI FU CTIO S
SWITCHI G TI E WAVEFOR S
TEST CIRCUITS
RO (Pin 1): Receiver Output. If the receiver output is
enabled(RE low), then if A > B by 200mV, RO will be high.
If A < B by 200mV, then RO will be low.
RE (Pin 2): Receiver Output Enable. A low enables the
receiver output, RO. A high input forces the receiver
output into a high impedance state.
DE (Pin 3): Driver Outputs Enable. A high on DE enables
the driver output. A and B, and the chip will function as a
line driver. A low input will force the driver outputs into a
high impedance state and the chip will function as a line
receiver.
U
DI
DI
3V
Figure 3. Driver/Receiver Timing Test Circuit
DE
–V
U
3V
0V
V
0V
B
A
O
O
A
B
U
Figure 1. Driver DC Test Load
A
B
R
U
DIFF
V
W
OD
LTC485 • F01
V
O
1/2 V
R
R
C
C
L1
L2
O
t
10%
V
r
A
B
OC
1.5V
Figure 5. Driver Propagation Delays
80%
t
t
RE
PLH
SKEW
W
15pF
f = 1MHz, t
LTC485 • F03
RO
V
r
DIFF
≤ 10ns, t
= V(A) – V(B)
DI (Pin 4): Driver Input. If the driver outputs are enabled
(DE high), then a low on DI forces the outputs A low and
B high. A high on DI with the driver outputs enabled will
force A high and B low.
GND (Pin 5): Ground Connection.
A (Pin 6): Driver Output/Receiver Input.
B (Pin 7): Driver Output/Receiver Input.
V
f
CC
≤ 10ns
(Pin 8): Positive Supply; 4.75 < V
RECEIVER
UNDER TEST
OUTPUT
t
PLH
OUTPUT
Figure 4. Driver Timing Test Load #2
Figure 2. Receiver Timing Test Load
t
f
TEST POINT
1.5V
90%
C
15pF
20%
RL
t
SKEW
C
500Ω
L
1/2 V
1k
O
S1
S2
S1
S2
CC
LTC485 • F05
< 5.25.
1k
LTC485 • F02
LTC485
LTC485 • F02
V
CC
sn 485LTC485ffs
V
CC
5