ltc4098-3.6 Linear Technology Corporation, ltc4098-3.6 Datasheet
ltc4098-3.6
Related parts for ltc4098-3.6
ltc4098-3.6 Summary of contents
Page 1
... An overvoltage protection circuit guards the LTC4098-3.6 from high voltage damage on the VBUS pin with just two external components. The LTC4098-3.6 is available in a 20-lead 3mm × 4mm × 0.75mm QFN surface mount package. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Bat Track and PowerPath are trademarks of Linear Technology Corporation ...
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... LTC4098-3.6 aBsoluTe maXimum raTinGs (Notes WALL (Transient) t < 1ms, BUS Duty Cycle < 1% .......................................... –0. WALL (Static), BAT, BATSENS, BUS CHRG, NTC, ................................................. –0. D0, D1, D2 .........–0.3V to Max (V BUS I .................................................................±10mA OVSENS I ....................................................................3mA CLPROG I ........................................................................2mA PROG I ......................................................................50mA CHRG .......................................................2.25A VOUT SW BAT I ......................................................................± ...
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... PROG V > PowerPath Switching BUS UVLO Regulator On, Battery Charger Off 0µA VOUT 0µA (Ideal Diode BUS VOUT Mode) Threshold Voltage Relative to V FLOAT LTC4098-3.6 = 3.01k, unless otherwise noted. CLPROG MIN TYP MAX UNITS 135 659 1231 0.32 2.04 1.188 100 4.30 4.35 3.95 4.00 3 ...
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... LTC4098-3.6 elecTrical characTerisTics erature range, otherwise specifications are at T SYMBOL PARAMETER t Safety Timer Termination Period TERM t Bad Battery Termination Time BADBAT h End of Charge Indication Current Ratio C/10 V CHRG Pin Output Low Voltage CHRG I CHRG Pin Input Current CHRG R Battery Charger Power FET ...
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... BUS PROG 100 R = 3.01k CLPROG 5x USB SETTING 0 3.6 3.0 3.3 2.7 BATTERY VOLTAGE (V) LTC4098-3 25°C, unless otherwise noted. A USB Compliant Load Current Available Before Discharging Battery 750 700 650 600 BUS R = 3.01k CLPROG 5x USB SETTING 550 4.2 2.7 3.0 3.3 ...
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... LTC4098-3.6 Typical perFormance characTerisTics Battery Drain Current vs Battery Voltage 0µA VOUT BUS BUS (SUSPEND MODE 2.7 3.0 3.3 BATTERY VOLTAGE (V) 409836 G10 V Current vs V Voltage BUS BUS (Suspend Mode—Includes OVP) 100 BAT = 3. 0mA VOUT ...
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... TEMPERATURE (°C) 100 409836 G22 V BUS 5V/DIV OVGATE 5V/DIV OVP INPUT VOLTAGE STEP 5V/DIV 409836 G24 LTC4098-3 25°C, unless otherwise noted Quiescent Current BUS vs Temperature BUS I = 0µA VOUT 17 5x MODE MODE ...
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... LTC4098-3.6 Typical perFormance characTerisTics OVP Protection Waveform V BUS 5V/DIV OVGATE 5V/DIV OVP INPUT VOLTAGE 5V TO 10V STEP 5V/DIV 500µs/DIV OVSENS Quiescent Current vs Temperature OVSENS –15 35 – TEMPERATURE (°C) 409836 G28 V BUS 5V/DIV OVGATE 5V/DIV OVP INPUT VOLTAGE ...
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... BAT. BAT (Pin 11): Single-Cell LiFePO on available power and load, a LiFePO either deliver system power charged from the battery charger. The LTC4098-3.6 will charge to a float voltage of 3.600V. V (Pin 12): Output Voltage of the Switching PowerPath OUT Controller and Input Voltage of the Battery Charger ...
Page 10
... ACPR (Pin 19): External Power Source Present Output (Active Low). ACPR indicates that the output of the external high voltage step-down switching regulator is suitable to for use by the LTC4098-3.6. It should be connected to BUS the gate of an external P-channel MOSFET transistor . See the Applica- whose source is connected to V OUT connected to WALL ...
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... BlocK DiaGram LTC4098-3.6 409836f ...
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... N-channel MOSFET to prevent damage to its inputs caused by ac- cidental application of high voltage. The LTC4098-3.6 contains both an internal 180mΩ ideal diode and an ideal diode controller designed for use with an external P-channel MOSFET. The ideal diodes from BAT ...
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... LTC4098-3.6 409836f ...
Page 14
... I I • h VBUS VBUSQ cLPROG R cLPROG where I is the quiescent current of the LTC4098-3.6, VBUSQ V is the CLPROG servo voltage in current limit, CLPROG R is the value of the programming resistor and CLPROG h is the ratio of the measured current at V CLPROG the sample current delivered to CLPROG. Refer to the ...
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... When high voltage is applied to the external regulator, WALL will rise toward this programmed output voltage. When WALL exceeds approximately 4.3V, ACPR is brought low and the Bat-Track control of the LTC4098-3.6 overdrives the local V control of the external high voltage step-down C switching regulator ...
Page 16
... See the Applications Information section for examples of multiple input protection, reverse input protection, and a table of recommended components. Ideal Diode from BAT to V The LTC4098-3.6 has an internal ideal diode as well WALL with just controller for an external ideal diode. Both the internal and BUS ...
Page 17
... BAT the LTC4098-3.6 drives the gate of the external P-chan- nel MOSFET transistor for automatic ideal diode control. The source of the external P-channel MOSFET should be connected to V and the drain should be connected to OUT BAT. Capable of driving a 1nF load, the IDGATE pin can control an external P-channel MOSFET transistor having an on-resistance of 30mΩ ...
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... When charge current drops to 1/10th the value programmed by R the CHRG pin is released (Hi-Z). The CHRG pin does not respond to the C/10 threshold if the LTC4098-3 current limit. This prevents false end-of-charge indications due to insufficient power available to the battery charger fault occurs while charging, the pin is switched at 35kHz ...
Page 19
... Shutdown Mode The USB switching regulator is enabled whenever V above the UVLO voltage and the LTC4098-3.6 is not in one of the two USB suspend modes (500µA or 2.5mA). When power is available from both the USB and high voltage inputs, the high voltage regulator is prioritized and the USB switching regulator is disabled ...
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... LTC4098-3.6 operaTion BAT < 2.85V RUN EVENT TIMER NO TIMER > 30 MINUTES YES INHIBIT CHARGING INDICATE BATTERY FAULT AT CHRG NO BAT > 2.85V YES 0 POWER ON/ ENABLE CHARGER CLEAR EVENT TIMER ASSERT CHRG LOW YES NTC OUT OF RANGE NO BAT > V – FLOAT BATTERY STATE 2.85V < BAT < V – ...
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... Choosing the Inductor Because the input voltage range and output voltage range of the PowerPath switching regulator are both fairly narrow, the LTC4098-3.6 was designed for a specific inductance value of 3.3µH. Some inductors which may be suitable for this application are listed in Table 3. Table 3. Recommended Inductors for the LTC4098-3.6 ...
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... WALL Each input is protected up to the drain-source breakdown, BVDSS, of MN1 and MN2. R1 must also be rated for the OVGATE power dissipated during maximum overvoltage. See the LTC4098-3.6 Operations section for an explanation of this calculation. V BUS Table 4 shows some N-channel MOSFETs that may be C1 suitable for overvoltage protection ...
Page 23
... Reverse Voltage Protection The LTC4098-3.6 can also be easily protected against the application of reverse voltage, as shown in Figure 8. D1 and R1 are necessary to limit the maximum VGS seen by MP1 during positive overvoltage events. D1’s breakdown voltage must be safely below MP1’s BVGS. The circuit shown in Figure 8 offers forward voltage protection up to MN1’ ...
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... F09a Figure 9. NTC Circuits , different in value from NOM a HOT • cOLD • and a are the resistance ratios at the COLD LTC4098-3.6 NTC BLOCK 4 0.765 • NTCBIAS – TOO_COLD + 5 – TOO_HOT 0.199 • NTCBIAS + + NTC_ENABLE – 0.1V (9b) 409836 F09b 409836f ...
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... An additional 22µF on the V ally contribute less than 100mA to the hot-plug inrush current. Voltage overshoot on V when connecting the LTC4098-3 lab power supply. This overshoot is caused by long leads from the power supply to V ply to V BUS of these long leads, and keep the voltage at V levels ...
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... LTC4098-3.6 and all of its external high frequency components. High frequency currents, such as the input current on the LTC4098-3.6, tend to find their way on the ground plane along a mirror path directly beneath the incident path on the top of the board. If there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits ...
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... OVGATE 1 OVSENS 3 15-17 D0-D2 LTC4098-3.6 8 CHRG 4 NTCBIAS R4 100k 5 NTC CLPROG PROG GND 100k 0.1µF 3.01k 681 0603 LTC4098-3 0.47µF L2 BOOST 10µ 499k 100k 3.3µH SYSTEM LOAD OUT 10 IDGATE M2 11 BAT C5 10µ ...
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... I LIM R1 27.4k GND V HVOK WALL ACPR BUS C C3 10µF 0805 2 R6 OVGATE 6.04k 1 OVSENS 3 15-17 D0-D2 TO µC LTC4098-3 µC CHRG 4 NTCBIAS R2 100k 5 NTC CLPROG PROG 100k R4 R5 0.1µF 3.01k 681 0603 M5 L1 3.3µH SYSTEM LOAD ...
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... BUS C C3 10µF 2 0805 OVGATE 1 OVSENS LTC4098-3.6 3 15-17 D0-D2 8 CHRG 4 NTCBIAS 5 NTC CLPROG PROG GND 0.1µF 3.01k 681 0603 LTC4098-3 0.1µF L1 BOOST 10V 4.7µ SENSE 5 V OUT L2 3.3µH SYSTEM 19 14 LOAD OUT 10 IDGATE 11 BAT C5 10µF ...
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... IN C1 4.7µF 50V 4 LT3653 I LIM R2 27.4k GND V HVOK WALL ACPR BUS C C3 10µF 0805 2 OVGATE 1 OVSENS LTC4098-3.6 3 15-17 D0-D2 8 CHRG 4 NTCBIAS R5 100k 5 NTC CLPROG PROG GND 100k 0.1µF 3.01k 681 0603 7 L1 BOOST C2 4.7µH 8 0.1µF , 10V ...
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... UDC Package 20-Lead Plastic QFN (3mm 4mm) (Reference LTC DWG # 05-08-1742 Rev Ø) 0.70 0.05 2.65 0.05 PACKAGE OUTLINE 2.50 REF 3.10 0.05 4.50 0.05 0.75 0. 0.05 TYP 3.00 0.10 2.50 REF 0.200 REF 0.00 – 0.05 LTC4098-3.6 PIN 1 NOTCH R = 0.20 OR 0.25 45 CHAMFER 1.50 REF 19 20 0.40 0. 2.65 0.10 1.65 0.10 (UDC20) QFN 1106 REV Ø 0.25 0. 0.115 0.50 BSC TYP BOTTOM VIEW— ...
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... V V WALL ACPR SW BUS 10µF V OVGATE OUT 0805 1 OVSENS IDGATE 15 D0 BAT LTC4098-3.6 BATSENS 8 CHRG NTCBIAS NTC CLPROG PROG GND 0.1µF 2k 681 0603 COMMENTS Complete Multifunction PMIC: Switch Mode Power Manager and Three Buck Regulators Plus LDO Charge Current Programmable Up to 1.5A from Wall Adapter Input, Synchronous Buck Converters Efficiency > ...