ltc4221 Linear Technology Corporation, ltc4221 Datasheet

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ltc4221

Manufacturer Part Number
ltc4221
Description
Dual Hot Swap Controller/power Sequencer With Dual Speed, Dual Level Fault Protection
Manufacturer
Linear Technology Corporation
Datasheet

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FEATURES
TYPICAL APPLICATIO
APPLICATIO S
Hot Swap is a trademark of Linear Technology Corporation.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Allows Safe Board Insertion and Removal from a
Live Backplane
Configurable Power Supply Sequencing
Soft-Start with Current Foldback Limits Inrush
Current
No External Gate Capacitor Required
Adjustable Dual Level Circuit Breaker Protection
Controls Supply Voltages from 1V to 13.5V
Independent N-Channel MOSFET High Side Drivers
FB Pin Monitors V
Latch Off or Automatic Retry on Current Fault
FAULT and PWRGD Outputs
Narrow 16-Pin SSOP Package
Electronic Circuit Breaker
Power Supply Sequencing
Live Board Insertion and Removal
Industrial High Side Switch/Circuit Breaker
V
V
FAULT
3.3V
2.5V
CC1
CC2
GND
CONNECTOR
BACKPLANE
(FEMALE)
U
OUT
CONNECTOR
PCB EDGE
(MALE)
for Overvoltage Protection
SHORT
LONG
LONG
SHORT
SHORT
LONG
*SMAJ10 (OPTIONAL)
*
U
10Ω
100nF
13.3k
21k
2-Channel Hot Swap Controller
10k
10k
*
100nF
Power Sequencer with Dual Speed,
10Ω
ON1
ON2
FAULT
GND
V
CC1
DESCRIPTIO
0.004Ω
The LTC
allows a board to be safely inserted and removed from a
live backplane. Using two independent high side gate
drivers to control two external N-channel pass transistors,
the output voltages can be ramped up with current foldback
to limit the inrush current during the start-up period. No
external compensation capacitors are required at the
GATE pins. The two channels can be configured to ramp up
and down separately or simultaneously for supply volt-
ages ranging from 2.7V to 13.5V and 1V to 13.5V for
channels 1 and 2 respectively.
Each channel has two current limit comparators that
provide dual level and dual speed overcurrent circuit
breaker protection after the start-up period. If any current
sense voltage exceeds 100mV for 1μs or 25mV for the
timeout delay (set by the C
the FAULT latch is set and both GATE pins are pulled low.
The FB pins monitor the respective channel output volt-
ages and provide the inputs for the PWRGD comparators
as well as overvoltage protection.
TIMER
SENSE1 GATE1 V
Dual Level Fault Protection
Dual Hot Swap Controller/
470nF
IRF7413
®
LTC4221
4221 is a 2-channel Hot Swap
CC2
0.004Ω
SENSE2 GATE2
FILTER
U
PWRGD2
PWRGD1
1nF
IRF7413
FB2
FB1
FILTER
14.3k
5.11k
at the FILTER pin), then
10k
TM
20k
5.11k
4221 TA01
LTC4221
10k
controller that
V
3.3V/5A
V
2.5V/5A
PWRGD2
PWRGD1
OUT1
OUT2
4221fa
1

Related parts for ltc4221

ltc4221 Summary of contents

Page 1

... IRF7413 10Ω 100nF 10Ω * 100nF V SENSE1 GATE1 V CC1 CC2 21k ON1 10k 13.3k ON2 LTC4221 10k FAULT GND TIMER 470nF LTC4221 U TM controller that at the FILTER pin), then FILTER V OUT1 3.3V/5A 0.004Ω IRF7413 V OUT2 2.5V/5A 14.3k SENSE2 GATE2 FB2 5.11k 10k 10k PWRGD2 PWRGD2 ...

Page 2

... TIMER Pin .................................................. – 0. GATE Pins (Note 3) ................................... – 0.3V to 21V PWRGD, FAULT, FILTER Pins ................... – 0.3V to 17V Operating Temperature Range LTC4221C ............................................... 0°C to 70°C LTC4221I ............................................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300° ORDER I FOR ATIO ...

Page 3

... PWRGD CC1 Normal Cycle – 200mV) Step SENSE – 50mV) Step. SENSE FILTER Open LTC4221 MIN TYP MAX UNITS μA ● –7 –9.5 –12 μA ● 75 100 125 16 mA ● 4.5 13 ● ...

Page 4

... LTC4221 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER t FAULT Low to GATE n Discharging P(FAULT-GATE Comparator Trip to GATE n P(OV-GATE) Discharging t Filter Comparator Trip to GATE n P(FILTER-GATE) Discharging t Circuit Breaker Reset Delay Time RESET t Turn Off Propagation Delay P(ON-GATE) Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired ...

Page 5

... – 1.5V CC2 CC1 T = 25° ΔV GATE1 13 12 ΔV GATE2 125 (V) CC1 LTC4221 V vs Temperature SENSE(SC) 26 CC1 CC1 V = 3.3V CC2 25.8 25.6 25.4 25.2 25.0 24.8 24.6 24.4 16 – – TEMPERATURE (°C) 4221 G08 I vs Temperature GATE(DN) ...

Page 6

... LTC4221 W U TYPICAL PERFOR A CE CHARACTERISTICS ΔV (V – GATE2 GATE2 CC1 vs Temperature 2.7V CC1 CC2 3.3V CC1 CC2 V = 13.5V 13.5V 14 CC1 CC2 100 –50 – TEMPERATURE (°C) 4221 G16 V vs Temperature ON(RESET) 0.440 CC1 V = 3.3V 0.435 CC2 ...

Page 7

... TMR(H) 1.240 CC2 1.238 1.236 1.234 1.232 1.230 1.228 1.226 1.224 V CC1 V 1.222 CC1 V CC1 1.220 125 –50 – TEMPERATURE (°C) LTC4221 I vs Temperature FILTER(DN) 2. 2.7V CC2 FILTER 1.95 = 13.5V 1.90 1.85 1.80 1.75 1.70 1.65 100 125 50 –50 – TEMPERATURE (°C) 4221 G26 ...

Page 8

... LTC4221 W U TYPICAL PERFOR A CE CHARACTERISTICS I vs Temperature FAULT(UP) –3 2.7V CC2 CC1 CC1 FAULT –3 13.5V CC1 –3.5 –3.7 –3.9 –4.1 –4.3 –4.5 –50 – 100 TEMPERATURE (°C) 4221 G34 V /V PWRGD(OL) FAULT(OL) vs Temperature 0.500 1.6mA ...

Page 9

... FAULT (Pin 7): Fault Status Input/Output. FAULT is a bidirectional pin input, pulsing V set the FAULT latch and bring the LTC4221 into the fault state output, FAULT is pulled high by an internal 3.8μA pull-up under normal operating conditions. When an overcurrent fault is detected by a SENSE pin or a overvoltage fault detected pin, the FAULT latch is set and the LTC4221 goes into the fault state ...

Page 10

... LTC4221 W BLOCK DIAGRA V CHARGE CC1 PUMP 1 OSCILLATOR CHARGE V PUMP 2 CC1 ON1 1 ON2 16 V CC1 105μA FILTER 8 1.8μA V CC1 3.8μA 0.816V FAULT 7 V CC1 + 9mV TO 25mV – CC1 V CC1 + 100mV – SENSE1 3 0.822V + 0.617V – FB1 5 COMPARATOR V CC2 + 9mV TO 25mV – ...

Page 11

... The flow of current may damage the connector pins and glitch the power bus, causing other boards in the system to reset. The LTC4221 is designed to turn on and off a circuit board’s supply voltages in a controlled manner, allowing insertion or removal without glitches or connector dam- age ...

Page 12

... TMR(L) ON(OFF) 9.5μA GATE(OV) 25mV 9mV + ΔV FB1 > V FB(UV) FB(HYST) + ΔV FB2 > V FB(UV) INITIAL TIMING CHANNEL 1 START-UP Figure 1. LTC4221 Operation FILTER(TH) + ΔV FAULT(TH) FAULT(HYST) CHANNEL 1 SLOW COMPARATOR ARMED CHANNEL 2 SLOW COMPARATOR ARMED 20μA V FILTER(TH) 1.8μA 105μA ...

Page 13

... V . CC2 ON Pin Functions The ON1 pin serves as a global reset for the LTC4221. It has an internal reset comparator with a high-to-low thresh- old of 0.4V, a 25mV hysteresis and a high-to-low glitch filter of 15μs. Pulling ON1 below this threshold will put the LTC4221 into a reset state in which the TIMER is pulled low by an internal N-channel MOSFET pull-down, the GATE pins are pulled low by separate internal 100μ ...

Page 14

... LTC4221 U U APPLICATIO S I FOR ATIO (UVL 0.851V ON1 TIMER GATE1 V OUT1 PWRGD1 ON2 GATE2 V OUT2 UVLO sequential power up from time points and a sequential power-down programmed from time points 9 to 11. To achieve this the circuit requires the functionality of the PWRGD1 pin and will be featured in the next section ...

Page 15

... FB pin from deasserting its PWRGD. The relationship between glitch filter time and an FB pin transient voltage is shown in Figure 4. Using the functionality of the PWRGD1 pin, the LTC4221 can be configured to do sequential power-up and power-down as shown by the circuit in Figure 5. Referring back to Figure 3, ...

Page 16

... Intermittent overloads may exceed the current limit as in Figure 7, but if the duration is sufficiently short, the FILTER pin may not reach the V LTC4221 will not shut down. To handle this situation, the FILTER discharges with 1.8μA whenever both V below 25mV. Any intermittent overload with an aggregate ...

Page 17

... Autoretry After a Fault Once the LTC4221 circuit breaker is tripped, FAULT is latched low and both GATE pins are pulled to ground. To 4221 F08 clear the internal FAULT latch and to restart the LTC4221, its ON1 pin must be pulsed below its reset threshold (V ON(RESET) ELECTRONIC CIRCUIT BREAKER ARMED ...

Page 18

... As shown in Figure 10, the FAULT (which has an internal 3.8μA pull-up current source) and both ON pins are connected together. The timing diagram in Figure 11 illustrates a simultaneous start-up sequence where the LTC4221 is powered up into a load overcurrent condition on channel 1. After the slow comparators are BACKPLANE PCB EDGE ...

Page 19

... 851 . V – • ON μ shown in the timing diagram of Figure 11, the autoretry circuitry will attempt to restart the LTC4221 with a duty cycle STARTUP Duty Cycle = + + INITIAL t is defined in Equation 1 and t FILTER tion the initial timing cycle delay, is given in INITIAL Equation 9 located in the Initial Timing Cycle section ...

Page 20

... When the card is being inserted into the bus connector, the long pins mate first which brings up the supplies at time point 1 of Figure 13. The LTC4221 is in reset mode as the ON1 pin is low. Both GATE pins and the TIMER pin are pulled low. At time point 2, the short pin makes contact and both ON pins are pulled high ...

Page 21

... MOSFET constant during the start-up cycle. The timing diagram in Figure 14 illustrates the operation of the LTC4221 in a channel start-up cycle with limited inrush ...

Page 22

... GATE n pin’s internal zener clamp during transient events. absolute maximum rating of ±20V A MOSFET with meets the two criteria for all the LTC4221 application ranges from 1V to 13.5V. Typically most 10V gate rated MOSFETs absolute maximum ratings of ±20V or greater, so have external V zener clamp is needed ...

Page 23

... A recommended layout for the SENSE resistors, the power MOSFETs, V GATE drive components around the LTC4221 is shown in Figure 16. For proper operation of the LTC4221’s elec- tronic circuit breaker, a 4-wire Kelvin connection to each SENSE resistor is used. Also, PCB layout for the external N-channel MOSFETs emphasizes optimal thermal man- agement of MOSFET power dissipation to keep θ ...

Page 24

... CHANNEL 1 W INPUT NOTE: DRAWING IS NOT TO SCALE *ADDITIONAL DETAILS OMITTED FOR CLARITY Figure 16. Recommended Layout for LTC4221 R U APPE DIX Table 1 lists some current sense resistors that can be used with the circuit breaker. Table 2 lists some power MOSFETs that are available. Table 3 lists the web sites of several Table 1 ...

Page 25

... ISS ON Semiconductor = 1570pF ISS ON Semiconductor = 2600pF ISS SENSE2 0.007Ω IRF7413 SENSE2 GATE2 20k CC2 12 FB2 PG2 5.11k 10k 11 PWRGD2 LTC4221 6 PWRGD1 R 32.4k 5 FB1 R 5.11k 4221 TA02 V OUT1 OUT2 3.3V 2.5A R PG1 10k PWRGD2 PWRGD1 F1 F2 4221fa 25 ...

Page 26

... LTC4221 6 PWRGD1 5 FB1 Q1 IRF7413 R Q2 SENSE2 0.004Ω IRF7413 14.3k SENSE2 GATE2 CC2 12 FB2 PG2 5.11k 10k 11 PWRGD2 LTC4221 6 PWRGD1 5 FB1 V OUT1 3. OUT2 2. PG1 10k PWRGD2 PWRGD1 R F1 20k R F2 5.11k 4221 TA03 V OUT1 3. OUT2 2 ...

Page 27

... IRF7413 R F3 14. SENSE1 GATE1 V SENSE2 GATE2 CC2 12 FB2 R F4 5.11k 11 PWRGD2 LTC4221 6 PWRGD1 5 FB1 4221 TA05 .189 – .196* .0250 BSC (4.801 – 4.978 .229 – .244 (5.817 – 6.198 OUT1 3 ...

Page 28

... Sequenced Power Good Outputs Q1 V IRF7413 3. SENSE2 0.004Ω IRF7413 V 2. 14.3k SENSE2 GATE2 CC2 FB2 R F4 5.11k PWRGD2 LTC4221 PWRGD1 R F1 20k FB1 R F2 5.11k 4221 TA06 LT 0707 REV A • PRINTED IN THE USA © LINEAR TECHNOLOGY CORPORATION 2004 OUT1 OUT2 4221fa ...

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