ltc3858-2 Linear Technology Corporation, ltc3858-2 Datasheet - Page 26

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ltc3858-2

Manufacturer Part Number
ltc3858-2
Description
Ltc3858-2 - Low Iq, Dual 2-phase Synchronous Step-down Controller
Manufacturer
Linear Technology Corporation
Datasheet
LTC3858-2
APPLICATIONS INFORMATION
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3858-2 circuits: 1) IC V
TV
transition losses.
1. The V
2. INTV
26
in the Electrical Characteristics table, which excludes
MOSFET driver and control currents. V
cally results in a small (<0.1%) loss.
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched
from low to high to low again, a packet of charge, dQ,
moves from INTV
a current out of INTV
than the control circuit current. In continuous mode,
I
charges of the topside and bottom side MOSFETs.
Supplying INTV
through EXTV
the driver and control circuits by a factor of (Duty Cycle)/
(Efficiency). For example, in a 20V to 5V application,
10mA of INTV
of V
10% or more (if the driver was powered directly from
V
CC
%Efficiency = 100% – (L1 + L2 + L3 + ...)
GATECHG
IN
regulator current, 3) I
) to only a few percent.
IN
CC
IN
current. This reduces the midcurrent loss from
current is the sum of the MOSFET driver and
current is the DC input supply current given
= f(Q
CC
CC
T
CC
current results in approximately 2.5mA
+ Q
will scale the V
CC
from an output-derived power source
B
to ground. The resulting dQ/dt is
), where Q
CC
2
that is typically much larger
R losses, 4) topside MOSFET
IN
T
and Q
current required for
IN
IN
current, 2) IN-
B
current typi-
are the gate
3. I
4. Transition losses apply only to the topside MOSFET(s),
fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current flows through L and
R
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R
of one MOSFET can simply be summed with the resis-
tances of L, R
example, if each R
= 10mΩ and R
output capacitance losses), then the total resistance
is 130mΩ. This results in losses ranging from 3% to
13% as the output current increases from 1A to 5A for
a 5V output, or a 4% to 20% loss for a 3.3V output.
Efficiency varies as the inverse square of V
same external components and output power level. The
combined effects of increasingly lower output voltages
and higher currents required by high performance digital
systems is not doubling but quadrupling the importance
of loss terms in the switching regulator system!
and become significant only when operating at high
input voltages (typically 15V or greater). Transition
losses can be estimated from:
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is
very important to include these “system” level losses
during the design phase. The internal battery and fuse
resistance losses can be minimized by making sure that
C
the switching frequency. A 25W supply will typically
require a minimum of 20μF to 40μF of capacitance
having a maximum of 20mΩ to 50mΩ of ESR. The
LTC3858-2 2-phase architecture typically halves this
input capacitance requirement over competing solu-
tions. Other losses including Schottky conduction losses
during dead-time and inductor core losses generally
account for less than 2% total additional loss.
2
SENSE
IN
R losses are predicted from the DC resistances of the
Transition Loss = (1.7) • V
has adequate charge storage and very low ESR at
, but is “chopped” between the topside MOSFET
SENSE
ESR
DS(ON)
= 40mΩ (sum of both input and
and ESR to obtain I
= 30mΩ, R
DS(ON)
IN
• 2 • I
, then the resistance
L
O(MAX)
= 50mΩ, R
2
R losses. For
OUT
• C
RSS
for the
SENSE
38582f
• f

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