ltc2355-12 Linear Technology Corporation, ltc2355-12 Datasheet
ltc2355-12
Related parts for ltc2355-12
ltc2355-12 Summary of contents
Page 1
... MSOP package. A Sleep shutdown feature further reduces power consumption to 13µW. The combination of speed, low power and tiny package makes the LTC2355-12/ LTC2355-14 suitable for high speed, portable applications. The 80dB common mode rejection allows users to elimi- nate ground loops and common mode noise by measuring signals differentially from the source ...
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... Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: Consult factory for parts specified with wider operating temperature ranges. The ● denotes the specifications which apply over the full operating = 25°C. With internal reference LTC2355-12 MIN TYP ● 12 ±0.25 ● –2 ±1 ● ...
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... DD OUT V = 3.1V 160µA DD OUT V = 3.1V 1.6mA DD OUT OUT 0V 3.3V OUT 3.3V OUT DD LTC2355-12/LTC2355-14 LTC2355-12 LTC2355-14 MIN TYP MAX MIN TYP MAX 71.1 74.2 69 71.1 71 73.8 –86 –86 –82 –76 –82 – –82 –82 0. ...
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... Output data can be read with an arbitrarily long clock. Note 17 Note 18: The LTC2355-14 is measured and specified with 14-bit resolution (1LSB = 152µV) and the LTC2355-12 is measured and specified with 12-bit resolution (1LSB = 610µV). Note 19: The sampling capacitor at each input accounts for 4.1pF of the must be within this range. ...
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... FREQUENCY (MHz –1 –2 –3 –4 12288 16384 0 2355 G07 LTC2355-12/LTC2355-14 = 25° 3.3V (LTC2355-14 SFDR vs Input Frequency 100 0 FREQUENCY (MHz) 2355 G02 1.4MHz Sine Wave 8192 Point FFT Plot 0 –10 – ...
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... TYPICAL PERFOR A CE CHARACTERISTICS Differential and Integral Linearity vs Conversion Rate –1 –2 –3 –4 2.0 2.2 2.4 2.6 2.8 3.0 CONVERSION RATE (Msps 25° 3.3V (LTC2355-12 and LTC2355-14 2.5V Power Bandwidth P –6 –12 –18 –24 –30 –36 1M 10M 100M FREQUENCY (Hz) 2355 G11 Internal Reference Voltage vs Load Current 2 ...
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... Nap mode. Four or more CONV pulses with SCK in fixed high or fixed low state start Sleep mode. 10µF 3. 14-BIT ADC 14 2.5V REFERENCE 6 11 EXPOSED PAD LTC2355-12/LTC2355-14 – analog inputs at the start of the previous IN THREE- STATE SDO SERIAL 8 OUTPUT PORT CONV 10 TIMING ...
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... INTERNAL SAMPLE S/H STATUS t 8 Hi-Z SDO SLK CONV NAP SLEEP V REF NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS SCK SDO 8 LTC2355-12 Timing Diagram HOLD t 10 SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION D11 D10 D9 ...
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... During conversion, the analog inputs draw only a small leakage current. If the source impedance of the driving circuit is low, then the LTC2355-12/LTC2355-14 inputs can be driven directly. As source impedance increases, so will acquisition time. For minimum acquisition time with high source impedance, a buffer amplifier must be used ...
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... TO 18V 2355 F01 Figure 2. Overdriving V INPUT RANGE The analog inputs of the LTC2355-12/LTC2355-14 may be driven fully differentially with a single supply. Each input may swing up to 2.5V internal reference, the noninverting input should never be more than 2.5V more positive than the inverting input. The ...
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... LSB values (i.e., 0.5LSB, 1.5LSB, 2.5LSB, FS – 1.5LSB). The output code is straight binary with 1LSB = 2.5V/16384 = 153µV for the LTC2355-14, and 1LSB = 2.5V/4096 = 610µV for the LTC2355-12. The LTC2355-14 has 1LSB RMS of random , independent of the white noise. LTC2355-12/LTC2355- – ...
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... LTC2355-12/LTC2355-14. The SCK and CONV inputs control the power-down modes (see Timing Diagrams). Two rising edges at CONV, without any intervening rising edges at SCK, put the LTC2355-12/ LTC2355-14 in Nap mode and the power consumption drops from 18mW to 4mW. The internal reference re- pins as shown in the mains powered in Nap mode ...
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... It is good practice to drive the LTC2355-12/LTC2355-14 CONV input first to avoid digital noise interference during the sample-to-hold transition triggered by CONV at the start of conversion also ...
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... CONV rises, the third rising edge of SCK starts clocking out the 12/14 data bits with the MSB sent first. A simple approach is to generate SCK to drive the LTC2355-12/ LTC2355-14 first and then buffer this signal with the appropriate number of inverters to drive the serial clock input of the processor serial port ...
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... TYP 0.53 ± 0.152 (.021 ± .006) DETAIL “A” SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP LTC2355-12/LTC2355-14 BOTTOM VIEW OF EXPOSED PAD OPTION 2.06 ± 0.102 (.081 ± .004) 1 1.83 ± 0.102 (.072 ± .004) 10 0.497 ± 0.076 (.0196 ± .003) ...
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... LTC2355-12/LTC2355-14 RELATED PARTS PART NUMBER DESCRIPTION ADCs LTC1402 12-Bit, 2.2Msps Serial ADC LTC1403/LTC1403A 12-/14-Bit, 2.8Msps Serial ADC LTC1403-1/LTC1403A-1 12-/14-Bit, 2.8Msps Serial ADC LTC1405 12-Bit, 5Msps Parallel ADC LTC1407/LTC1407A 12-/14-Bit, 3Msps Simultaneous Sampling ADC 3V, 2-Channel Differential, Unipolar Inputs, 14mW, MSOP Package ...