mcm63p631 Freescale Semiconductor, Inc, mcm63p631 Datasheet
mcm63p631
Related parts for mcm63p631
mcm63p631 Summary of contents
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... For read cycles, pipelined SRAMs output data is temporarily stored by an edge–triggered output register and then released to the output buffers at the next rising edge of clock (K). The MCM63P631 operates from a 3.3 V power supply, all inputs and outputs are LVTTL compatible. MCM63P631–117 = 4.5 ns access / 8.5 ns cycle (117 MHz) MCM63P631– ...
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... LBO ADV K ADSC ADSP SA SA1 SA0 SGW SW SBa SBb SBc SBd SE1 SE2 SE3 G ZZ MCM63P631 2 FUNCTIONAL BLOCK DIAGRAM BURST COUNTER K2 CLR 2 16 ADDRESS REGISTER WRITE REGISTER a WRITE REGISTER b WRITE REGISTER c WRITE REGISTER ENABLE ENABLE REGISTER REGISTER 2 16 64K x 32 ARRAY ...
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... NC 79 DQb 78 DQb DQb DQb 74 73 DQb 72 DQb DQb 68 DQb DQa 63 DQa DQa 58 DQa 57 DQa 56 DQa DQa 52 DQa MCM63P631 3 ...
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... MCM63P631 4 Symbol Type ADSC Input Synchronous Address Status Controller: Active low, is used to latch a new external address. Used to initiate a READ, WRITE or chip deselect. ...
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... High–Z READ 5 X High–Z 1 High–Z READ 0 DQ READ 1 High–Z READ 0 DQ READ 1 High–Z READ 0 DQ READ 1 High–Z READ 0 DQ READ X High–Z WRITE X High–Z WRITE X High–Z WRITE X High–Z WRITE X High–Z WRITE MCM63P631 5 ...
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... SGW Read H Read H Write Byte a H Write Byte b H Write Byte c H Write Byte d H Write All Bytes H Write All Bytes L MCM63P631 6 G I/O Status L Data Out (DQx) H High–Z X High–Z X High–Z X High–Z 3rd Address (Internal X01 X10 X10 X ...
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... This device contains circuitry to protect the inputs against damage due to high static volt- ages or electric fields; however advised that normal precautions be taken to avoid application of any voltage higher than maxi- mum rated voltages to this high–impedance circuit. Max Unit Notes C/W 4 MCM63P631 7 ...
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... MCM63P631–7 MCM P MCM63P631–8 I SB2 – 0 SB3 MCM63P631–117 I SB4 ) MCM63P631–4.5 MCM MCM63P631–7 P MCM63P631–8 MCM63P631–117 I SB5 MCM63P631–4.5 MCM63P631–7 MCM63P631– – 0.2 V. Symbol I/O Min Typ Max Unit 3 ...
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... KHKH t KHKH — — KHKH 15 — MCM63P631 9 ...
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... MCM63P631 10 MOTOROLA FAST SRAM ...
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... MCM63P631 11 ...
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... SLEEP MODE A sleep mode feature, the ZZ pin, has been implemented on the MCM63P631. It allows the system designer to place the RAM in the lowest possible power condition by asserting ZZ. The sleep mode timing diagram shows the different modes of operation: Normal Operation, No READ/WRITE ...
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... K ADDR DQx Q(A) READS Figure 2. Configured as Non–Burst Pipelined Synchronous SRAM MOTOROLA FAST SRAM D Q(B) Q(C) Q( D(E) D(F) D(G) D(H) WRITES MCM63P631 13 ...
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... Motorola Memory Prefix Part Number Full Part Numbers — MCM63P631TQ117 MCM63P631 14 ORDERING INFORMATION (Order by Full Part Number) MCM 63P631 Blank = Trays Tape and Reel Speed (117 = 117 MHz, 4.5 = 4 ns) Package (TQ = TQFP) MCM63P631TQ4.5 MCM63P631TQ117R MCM63P631TQ4.5R MCM63P631TQ7 MCM63P631TQ8 MCM63P631TQ7R MCM63P631TQ8R ...
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... REF S 0.20 ––– 0.008 ––– R1 0.08 ––– 0.003 ––– R2 0.08 0.20 0.003 0.008 ––– 0 ––– MCM63P631 15 ...
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... Motorola, Inc. Motorola, Inc Equal Mfax is a trademark of Motorola, Inc. JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, MOTOROLA FAST SRAM MCM63P631/D ...