mcf52221 Freescale Semiconductor, Inc, mcf52221 Datasheet
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... Freescale Semiconductor Data Sheet MCF52223 ColdFire Microcontroller Supports MCF52223 & MCF52221 The MCF52223 is a member of the ColdFire reduced instruction set computing (RISC) microprocessors. This document provides an overview of the 32-bit MCF52223 microcontroller, focusing on its highly integrated and diverse feature set. This 32-bit device is based on the Version 2 ColdFire core operating at a frequency MHz, offering high performance and low power consumption ...
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MCF52223 Family Configurations . . . . . . . . . . . . . . . . . . . . . .3 1.1 Block Diagram ...
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MCF52223 1 ColdFire Version 2 Core with MAC (Multiply-Accumulate Unit) System Clock Performance (Dhrystone 2.1 MIPS) Flash / Static RAM (SRAM) Interrupt Controller (INTC) Fast Analog-to-Digital Converter (ADC) USB On-The-Go (USB OTG) Four-channel Direct-Memory Access (DMA) Software Watchdog Timer (WDT) ...
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MCF52223 Family Configurations 1.1 Block Diagram Figure 1 shows a top-level block diagram of the MCF52223. Package options for this family are described later in this document. EzPD EzPQ 4 CH DMA To/From PADI JTAG_EN MUX JTAG TAP AN[7:0] ADC ...
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Feature Overview The MCF52223 family includes the following features: • Version 2 ColdFire variable-length RISC processor core — Static operation — 32-bit address and data paths on-chip — MHz processor core frequency — Sixteen general-purpose, 32-bit ...
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MCF52223 Family Configurations — Automatic interrupt generation with programmable level • Queued serial peripheral interface (QSPI) — Full-duplex, three-wire synchronous transfers — four chip selects available — Master mode operation only — Programmable bit rates up to half ...
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Maintains system time-of-day clock — Provides stopwatch and alarm interrupt functions • Software watchdog timer — 32-bit counter — Low-power mode support • Clock generation features — One to 48 MHz crystal, 8 MHz on-chip relaxation oscillator, or external ...
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MCF52223 Family Configurations • General purpose I/O interface — bits of general purpose I/O — Bit manipulation supported via set/clear functions — Programmable drive strengths — Unused peripheral pins may be used as extra GPIO • JTAG ...
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Test logic, implemented using static logic design, is independent of the device system logic. The MCF52223 implementation can: • Perform boundary-scan operations to test circuit board electrical continuity • Sample MCF52223 system ...
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MCF52223 Family Configurations 1.2.8 UARTs The MCF52223 has three full-duplex UARTs that function independently. The three UARTs can be clocked by the system bus clock, eliminating the need for an external clock source. On smaller packages, the third UART is ...
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The 16-bit pulse accumulator can operate as a simple event counter or a gated time accumulator. 1.2.14 Periodic Interrupt Timers (PIT0 and PIT1) The two periodic interrupt timers (PIT0 and PIT1) are 16-bit ...
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... Each port has registers that configure, monitor, and control the port pins. 1.2.23 Part Numbers and Packaging This product is RoHS-compliant. Refer to the product page at information. Part Number Summary Part Number Flash / SRAM MCF52221 128 Kbytes / 16 Kbytes MCF52223 256 Kbytes / 32 Kbytes Figure 2 shows the pinout configuration for the 100 LQFP. 12 freescale.com ...
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URTS1 5 TEST 6 UCTS0 URXD0 7 UTXD0 8 URTS0 9 SCL 10 SDA 11 QSPI_CS3 12 QSPI_CS2 QSPI-DIN 16 QSPI_DOUT 17 QSPI_CLK ...
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MCF52223 Family Configurations Figure 3 shows the pinout configuration for the 81 MAPBGA UTXD1 RSTI SS B URTS1 URXD1 RSTO C UCTS0 TEST UCTS1 D URXD0 UTXD0 URTS0 E SCL SDA F QSPI_CS3 QSPI_CS2 QSPI_DIN G ...
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Figure 4 shows the pinout configuration for the 64 LQFP and 64 QFN. Figure 4. 64 LQFP and 64 QFN Pin Assignments V DD URTS1 TEST UCTS0 URXD0 UTXD0 URTS0 SCL SDA QSPI_DIN QSPI_DOUT QSPI_CLK QSPI_CS0 ...
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Table 2. Pin Functions by Primary and Alternate Purpose Pin Primary Secondary Tertiary Group Function Function Function ADC AN7 — AN6 — AN5 — AN4 — AN3 — AN2 — AN1 — AN0 — 3 SYNCA — 3 SYNCB — ...
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Table 2. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Tertiary Group Function Function Function Interrupts IRQ7 — IRQ6 — USB_ID IRQ5 — USB_VBUSV IRQ4 — USB_PULLU IRQ3 — USB_SESSE IRQ2 — USB_SESSV IRQ1 SYNCA USB_ALT_CL JTAG/BDM ...
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Table 2. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Tertiary Group Function Function Function QSPI QSPI_DIN/ — URXD1 EZPD QSPI_DOUT/ — UTXD1 EZPQ QSPI_CLK/ SCL URTS1 EZPCK QSPI_CS3 SYNCA USB_DP_PD QSPI_CS2 — USB_DM_PD QSPI_CS1 — USB_PULLU ...
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Table 2. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Group Function Function Function UART 0 UCTS0 — USB_VBUSE URTS0 — USB_VBUSD URXD0 — USB_RCV UTXD0 — USB_SUSPE UART 1 UCTS1 SYNCA URTS1 SYNCB URXD1 — USB_OE ...
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These signals are multiplexed on other pins. 4 For primary and GPIO functions only. 5 Only when JTAG mode is enabled. 6 CLKMOD0 and CLKMOD1 have internal pull-down resistors; however, the use of external resistors is very strongly recommended. ...
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Reset Signals Table 3 describes signals used to reset the chip reset indication. Signal Name Abbreviation Reset In RSTI Reset Out RSTO 1.4 PLL and Clock Signals Table 4 describes signals used to support the on-chip ...
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MCF52223 Family Configurations 1.6 External Interrupt Signals Table 7 describes the external interrupt signals. Signal Name Abbreviation External Interrupts IRQ[7:1] 1.7 Queued Serial Peripheral Interface (QSPI) Table 8 describes the QSPI signals. Table 8. Queued Serial Peripheral Interface (QSPI) Signals ...
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UART Module Signals Table 10 describes the UART module signals. Signal Name Abbreviation Transmit Serial Data UTXDn Output Receive Serial Data URXDn Input Clear-to-Send UCTSn Request-to-Send URTSn 1.11 DMA Timer Signals Table 11 describes the signals of the four ...
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MCF52223 Family Configurations 1.13 General Purpose Timer Signals Table 13 describes the general purpose timer signals. Signal Name Abbreviation General Purpose Timer GPT[3:0] Input/Output 1.14 Pulse Width Modulator Signals Table 14 describes the PWM signals. Signal Name Abbreviation PWM Output ...
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Table 15. Debug Support Signals (continued) Signal Name Abbreviation Development Serial DSI Input Development Serial DSO Output Debug Data DDATA[3:0] Processor Status Clock PSTCLK Processor Status PST[3:0] Outputs All Processor Status ALLPST Outputs 1.16 EzPort Signal Descriptions Table contains a ...
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Electrical Characteristics 1.17 Power and Ground Pins The pins described in Table 17 provide system power and ground to the chip. Multiple pins are provided for adequate current capability. All power supply pins must have adequate bypass capacitance for high-frequency ...
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Maximum Ratings Rating Supply voltage Clock synthesizer supply voltage RAM standby supply voltage USB standby supply voltage 3 Digital input voltage EXTAL pin voltage XTAL pin voltage Instantaneous maximum current Single pin limit (applies to all pins) Operating temperature ...
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Electrical Characteristics 2.2 Current Consumption Table 19, Table 20, and Figure 5 show the typical current consumption in low-power modes. Table 19. Current Consumption in Low-Power Mode, Code From Flash Memory Mode 4 Stop mode 3 (Stop 11) 4 Stop ...
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Figure 5. Plot of Current Consumption in Low-Power Modes Table 21. Typical Active Current Consumption Specifications Characteristic 8 MHz core & I/O 16 MHz core & I/O 64 MHz core & I/O 80 MHz core & I/O RAM standby supply ...
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Electrical Characteristics 2.3 Thermal Characteristics Table 22 lists thermal resistance values. 100 LQFP Junction to ambient, natural convection Junction to ambient, natural convection Junction to ambient, (@200 ft/min) Junction to ambient, (@200 ft/min) Junction to board Junction to case Junction ...
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Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written in conformance with Psi-JT. The average chip-junction temperature (T Where: ...
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Electrical Characteristics 2.5 ESD Protection Table 25. ESD Protection Characteristics Characteristics ESD target for Human Body Model ESD target for Machine Model HBM circuit description MM circuit description Number of pulses per pin (HBM) • Positive pulses • Negative pulses ...
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Table 26. DC Electrical Specifications (continued) Characteristic Output high voltage (high drive Output low voltage (high drive Output high voltage (low drive Output low voltage ...
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Electrical Characteristics Table 27. PLL Electrical Specifications (continued) (V Characteristic Frequency un-LOCK range Frequency LOCK range CLKOUT period jitter , measured at f • Peak-to-peak (clock edge to clock edge) • Long term (averaged over 2 ...
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CLKOUT GPIO Outputs GPIO Inputs 2.9 Reset Timing Table 29. Reset and Configuration Override Timing NUM Characteristic R1 RSTI input valid to CLKOUT High R2 CLKOUT High to RSTI Input invalid 2 R3 RSTI input valid time R4 CLKOUT High ...
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Electrical Characteristics 2 2. Input/Output Timing Specifications 2 Table 30 lists specifications for the I 2 Table 30 Input Timing Specifications between I2C_SCL and I2C_SDA Num 11 Start condition hold time I2 Clock low period I3 ...
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Figure 8 shows timing for the values in I2 SCL I1 SDA 2.11 Analog-to-Digital Converter (ADC) Parameters Table 32 lists specifications for the analog-to-digital converter. Name Characteristic V Low reference voltage REFL V High reference voltage REFH V ADC analog ...
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Electrical Characteristics Name Characteristic THD Total harmonic distortion SFDR Spurious free dynamic range SINAD Signal-to-noise plus distortion ENOB Effective number of bits 1 All measurements are made INL measured from ...
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DMA Timers Timing Specifications Table 33 lists timer module AC timings. Table 33. Timer Module AC Timing Specifications Name T1 DTIN0 / DTIN1 / DTIN2 / DTIN3 cycle time T2 DTIN0 / DTIN1 / DTIN2 / DTIN3 pulse width ...
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Electrical Characteristics 2.15 JTAG and Boundary Scan Timing Num Characteristics J1 TCLK frequency of operation J2 TCLK cycle period J3 TCLK clock pulse width J4 TCLK rise and fall times J5 Boundary scan input data setup time to TCLK rise ...
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TCLK V IL Data Inputs Data Outputs Data Outputs Data Outputs TCLK V IL TDI TMS TDO TDO TDO TCLK TRST Freescale Semiconductor J5 Input Data Valid Figure 12. Boundary Scan (JTAG) Timing J9 Input Data Valid ...
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Electrical Characteristics 2.16 Debug AC Timing Specifications Table 36 lists specifications for the debug AC timing parameters shown in Num D1 PST, DDATA to CLKOUT setup D2 CLKOUT to PST, DDATA hold D3 DSI-to-DSCLK setup 1 D4 DSCLK-to-DSO hold D5 ...
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Figure 16 shows BDM serial port AC timing for the values in CLKOUT DSCLK D3 DSI DSO Freescale Semiconductor Table 36. D5 Current D4 Past Figure 16. BDM Serial Port AC Timing MCF52223 ColdFire Microcontroller, Rev. 2 Electrical Characteristics Next ...
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Mechanical Outline Drawings 3 Mechanical Outline Drawings This section describes the physical properties of the 3.1 64-pin LQFP Package 44 MCF52223 and its derivatives. MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...
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Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 45 ...
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Mechanical Outline Drawings 46 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...
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QFN Package Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 47 ...
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Mechanical Outline Drawings 48 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...
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Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 49 ...
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Mechanical Outline Drawings 50 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...
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MAPBGA Package Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 51 ...
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Mechanical Outline Drawings 52 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...
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LQFP Package Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 53 ...
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Mechanical Outline Drawings 54 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...
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Revision History Revision 2 • Formatting, layout, spelling, and grammar corrections. • Removed the “Preliminary” label. • Added missing current consumption data (Section 2.2). • Added revision history. • Corrected signal names in block diagram to match those in ...
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... Freescale sales representative. For information on Freescale’s Environmental Products program http://www.freescale.com/epp. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. All rights reserved. ...