ltc2908its8-c1-trpbf Linear Technology Corporation, ltc2908its8-c1-trpbf Datasheet - Page 13

• Manufacturer Part Number: ltc2908its8-c1-trpbf
• Description: Precision Six Input Supply Monitor
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
RST Output Characteristics
The DC characteristics of the RST pull-up and pull-down
strength are shown in the Typical Performance Character-
istics section. The RST output has a weak internal pull-up
to V
The weak pull-up and strong pull-down arrangement
allows this pin to have open-drain behavior while possess-
ing several other beneficial characteristics.
The weak pull-up eliminates the need for external pull-up
resistors when the rise time on these pins is not critical. On
the other hand, the open-drain RST behavior allows for
wired-OR connections and can be useful when more than
one signal needs to pull down on the RST line.
As noted in the discussion of power-up and power-down,
the circuits that drive RST are powered by V
fault condition, V
mum V
Output Rise and Fall Time Estimation
The following formula estimates the output fall time (90%
to 10%) for a particular external load capacitance (C
where R
TYPICAL APPLICATIO S
t
FALL
CC
= Max(V1, V2) and a strong pull-down to ground.
OL
≈ 2.2 • R
PD
= 0.15V at RST.
is the on-resistance of the internal pull-down
PD
CC
U
• C
of at least 0.5V guarantees a maxi-
LOAD
U
Six Supply Monitor, 5% Tolerance, 12V, 5V, 3.3V, 2.5V, 1.8V, 1V
U
W
DC/DC
DC/DC
DC/DC
DC/DC
DC/DC
12V
5V
3.3V
2.5V
1.8V
1.0V
V1
U
CC
0.1µF
C1
. During
0.1µF
LOAD
C2
V2 V3 V4
):
LTC2908-A1
GND
2.15M
transistor estimated to be typically 40Ω at room tempera-
ture (25°C) and C
the pin. Assuming a 150pF load capacitance, the fall time
is about 13ns.
The rise time on the RST pin is limited by a weak internal
pull-up current source to V
mates the output rise time (10% to 90%) at the RST pin:
where R
Notice that this pull-up transistor is modeled as a 6µA
current source in the Block Diagram as a typical
representation.
The on-resistance as a function of the V
voltage (for V
follows:
At V
capacitance, the rise time is 86µs. A smaller external pull-
up resistor may be used if the output needs to pull up faster
and/or to a higher voltage. For example, the rise time
reduces to 3.3µs for a 150pF load capacitance when using
a 10k pull-up resistor.
R1
V
ADJ1
t
R
RISE
CC
PU
100k
R2
= 3.3V, R
=
≈ 2.2 • R
PU
86.6k
MAX V V
R3
V
is the on-resistance of the pull-up transistor.
ADJ2
RST
CC
100k
R4
(
6 10
> 1V) at room temperature is estimated as
2908 TA02
PU
•
PU
LOAD
1 2
,
SYSTEM
is about 260k. Using 150pF for load
• C
5
)
is the external load capacitance on
LOAD
–
1
V
CC
Ω
. The following formula esti-
CC
LTC2908
= Max(V1, V2)
13
2908fb