ltc1799is5-trpbf Linear Technology Corporation, ltc1799is5-trpbf Datasheet - Page 5

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ltc1799is5-trpbf

Manufacturer Part Number
ltc1799is5-trpbf
Description
1khz To 33mhz Resistor Set Sot-23 Oscillator
Manufacturer
Linear Technology Corporation
Datasheet
BLOCK DIAGRA
PI FU CTIO S
V
must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a 0.1µF capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane for
best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V
mines the oscillator frequency. The voltage on this pin is
held by the LTC1799 to approximately 1.13V below the V
voltage. For best performance, use a precision metal film
resistor with a value between 10k and 200k and limit the
capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the ÷1 setting, the highest frequency range.
+
(Pin 1): Voltage Supply (2.7V ≤ V
U
U
I
R
RES
SET
1
3
2
U
GND
V
SET
+
+
W
V
BIAS
I
RES
+
+
GAIN = 1
≤ 5.5V). This supply
V
RES
(V
= 1.13V ±25%
+
– V
SET
+
)
deter-
ƒ
MO
= 100MHz • kΩ •
MASTER OSCILLATOR
+
Floating Pin 4 divides the master oscillator by 10. Pin 4
should be tied to V
frequency range. To detect a floating DIV pin, the LTC1799
attempts to pull the pin toward midsupply. This is realized
with two internal current sources, one tied to V
4 and the other one tied to ground and Pin 4. Therefore,
driving the DIV pin high requires sourcing approximately
5µA. Likewise, driving DIV low requires sinking 5µA.
When Pin 4 is floated, preferably it should be bypassed by
a 1nF capacitor to ground or it should be surrounded by a
ground shield to prevent excessive coupling from other
PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ
and/or 10pF loads. Larger loads may cause inaccuracies
due to supply bounce at high frequencies. Transients will
not cause latchup if the current into/out of the OUT pin is
limited to 50mA.
(V
+
I
– V
RES
SET
)
DIVIDER
SELECT
PROGRAMMABLE
+
(÷1, 10 OR 100)
INPUT DETECT
THREE-STATE
for the ÷100 setting, the lowest
DIVIDER
GND
V
+
OUT
DIV
5µA
5µA
LTC1799
1799 BD
5
4
sn1799 1799fbs
+
and Pin
5

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