ltc1726-5 Linear Technology Corporation, ltc1726-5 Datasheet - Page 5

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ltc1726-5

Manufacturer Part Number
ltc1726-5
Description
Triple Supply Monitor And ?p Supervisor With Adjustable Reset And Watchdog Timer
Manufacturer
Linear Technology Corporation
Datasheet
PI FU CTIO S
V
power to the part when the voltage on this pin is greater
than the voltage on V
with a 0.1µF or larger ceramic capacitor.
V
supplies power to the part when the voltage on this pin is
greater than the voltage on V
ground with a 0.1µF or larger ceramic capacitor.
V
also supplies power to the part when the voltage on this
pin is greater than the voltage on V
ground with a 0.1µF or larger ceramic capacitor.
V
it can be tied to either V
GND (Pin 4): Ground.
WDI (Pin 5): Watchdog Input. A logic input whose rising
or falling edge must occur on this pin within the selected
watchdog time-out period or a reset pulse will occur. The
watchdog time-out period is set by the value of the
capacitor that is placed on the WT pin. The rising or falling
edge of this pin clears the voltage on the WT capacitor,
preventing a reset pulse from occurring. If the watchdog
TYPICAL PERFOR A CE CHARACTERISTICS
CC3
CC5
CC25
CCA
100m
100µ
1000
U
10m
100
1m
10
1
(Pin 3): 1V Sense, High Impedance Input. If unused
(Pin 2): 5V Sense Input (LTC1726-5). This pin also
(Pin 1): 3.3V Sense Input. This pin also supplies
1p
(Pin 2): 2.5V Sense Input (LTC1726-2.5). This pin
Watchdog Time-Out Period vs
Capacitance
T
A
= 25°C
U
10p
100p
C
WT
1n
U
CC25
(FARAD)
10n
CC3
/V
100n
CC5
, V
W
CC5
. Bypass this pin to ground
CC3
1726 G12
U
or V
CC3
. Bypass this pin to
10µ
. Bypass this pin to
CC25
.
100m
100µ
10m
10µ
100
1m
10
1
1p
Reset Time-Out Period vs
Capacitance
T
A
= 25°C
10p
100p
C
RT
1n
timer is not cleared, a reset pulse will occur. The watch-
dog timer is cleared during a reset and restarts when the
reset is deasserted. When disabling the watchdog func-
tion, this pin should be connected to either V
ground and WT must be grounded.
RST (Pin 6): Reset Logic Output. Active low, open-drain
logic output with weak pull-up to V
one or more of the supplies are below trip thresholds.
After all supplies become valid, the reset remains as-
serted for the period set by the capacitor on the RT pin.
The watchdog timer can also trigger the reset whenever
the watchdog time-out period is exceeded. This pin can
be pulled up greater than V
logic.
WT (Pin 7): Watchdog Time-Out Input. Place a capacitor
between this pin and ground to adjust the watchdog time-
out period. To determine the watchdog time-out period:
with t
capacitor will generate a 1s watchdog time-out period.
The watchdog function can be disabled by connecting
this pin to ground.
(FARAD)
t
10n
WT
WT
= 21.8 • C
100n
in µs and C
1726 G15
10µ
WT
WT
2
0
3
1
0
in pF. As an example, a 47nF
RST Output Voltage vs
Supply Voltage (LTC1726-2.5)
V
10k PULL-UP FROM V
T
CC3
A
= 25°C
CC3
= V
CC25
when interfacing to 5V
1
= V
CC3
CCA
V
CC3
. Asserted when
CC3
LTC1726
(V)
2
TO RST
CC3
3
1726 F13
1726fb
5
or

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