ltc1456cs8-trpbf Linear Technology Corporation, ltc1456cs8-trpbf Datasheet - Page 7

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ltc1456cs8-trpbf

Manufacturer Part Number
ltc1456cs8-trpbf
Description
Ltc1456 - 12-bit Rail-to-rail Micropower Dac With Clear Input
Manufacturer
Linear Technology Corporation
Datasheet
OPERATIO
Serial Interface
The data on the D
on the rising edge of the clock. The MSB is loaded first. The
DAC register loads the data from the shift register when
CS/LD is pulled high. The CLK is disabled internally when
CS/LD is high. Note: CLK must be low before CS/LD is
pulled low to avoid an extra internal clock pulse.
When CLR is pulled low it asynchronously resets the shift
and DAC registers to all zeros.
The buffered output of the 12-bit shift register is available
on the D
LTC1456s may be daisy-chained together by connecting
the D
The circuit below shows a digitally programmable current
source from an external voltage source using an external
op amp, an LT
digital word from 0 to 4095 is loaded into the LTC1456 and
its output correspondingly swings from 0V to 4.095V. In
the configuration shown, this voltage will be forced across
the resistor R
current will range from 0mA at zero scale to 10mA at full
scale. The minimum voltage for V
load resistor R
resistor of 50 , the voltage source can be as low as 5V.
TYPICAL
OUT
OUT
pin to the D
pin which swings from GND to V
®
A
APPLICATION
1077 and an NPN transistor (2N3440). Any
. If R
L
U
and Q1’s V
IN
P
input is loaded into the shift register
IN
A
is chosen to be 410 the output
pin of the next chip, while the CLK
CESAT
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
CLR
CLK
D
CS/LD
S
IN
voltage. With a load
is determined by the
LTC1456
GND
V
5V
Digitally Programmable Current Source
CC
CC
. Multiple
V
OUT
0.1 F
+
and CS/LD signals remain common to all chips in the daisy
chain. The serial data is clocked to all of the chips, then the
CS/LD signal is pulled high to update all of them simulta-
neously.
Voltage Output
The LTC1456's rail-to-rail buffered output can source or
sink 5mA over the entire operating temperature range
while pulling to within 300mV of the positive supply
voltage or ground. The output swings to within a few
millivolts of either supply rail when unloaded and has an
equivalent output resistance of 40 when driving a load to
the rails. The output can drive 1000pF without going into
oscillation.
LT1077
P
TO NEXT DAC FOR
DAISY-CHAINING
12-Bit 5V Single Supply Voltage Output DAC
V
FOR R
S
+ 5V TO 100V
L
Q1
2N3440
R
R
410
50
L
A
1456 TA04
I
OUT
D
CLK
CS/LD
D
IN
OUT
=
D
4096 • R
IN
4.5V TO 5.5V
CLR
• 4.095
LTC1456
V
CC
A
GND
0mA TO 10mA
V
OUT
LTC1456
0.1 F
OUTPUT
0V TO 4.095V
1456 TA03
7

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