lt1765es8-trpbf Linear Technology Corporation, lt1765es8-trpbf Datasheet - Page 12

• Manufacturer Part Number: lt1765es8-trpbf
• Description: Monolithic 3a, 1.25mhz Step-down Switching Regulators
• Manufacturer: Linear Technology Corporation

LT1765/LT1765-1.8/LT1765-2.5/
LT1765-3.3/LT1765-5
APPLICATIO S I FOR ATIO
maximum rating. A ground plane should always be used
under the switcher circuitry to prevent interplane coupling
and overall noise.
The V
possible from the switch and boost nodes. The LT1765
pinout has been designed to aid in this. The ground for
these components should be separated from the switch
current path. Failure to do so will result in poor stability or
subharmonic like oscillation.
Board layout also has a significant effect on thermal
resistance. The exposed pad or GND pin is a continuous
copper plate that runs under the LT1765 die. This is the
best thermal path for heat out of the package as can be
seen by the low θ
the thermal resistance from Pin 4 or exposed pad onto the
board will reduce die temperature and increase the power
capability of the LT1765. This is achieved by providing as
much copper area as possible around this pin/pad. Also,
having multiple solder filled feedthroughs to a continuous
copper plane under LT1765 will help in reducing thermal
resistance. Ground plane is usually suitable for this pur-
pose. In multilayer PCB designs, placing a ground plane
next to the layer with the LT1765 will reduce thermal
resistance to a minimum.
12
INPUT
CERAMIC
15V
4.7µF
C
C3
and FB components should be kept as far away as
OFF
ON
V
SHDN
JC
IN
SYNC
of the exposed pad package. Reducing
U
LT1765-33
BOOST
GND
U
V
C
V
SW
FB
0.18µF
C
2.2nF
Figure 6. Typical Application and Layout (Topside Only Shown)
C
C2
W
D1
B220A
CMDSH-3
2.7µH
L1
D2
U
1765 F06
C1
4.7µF
CERAMIC
OUTPUT
3.3V
2.5A
THERMAL CALCULATIONS
Power dissipation in the LT1765 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following
formulas show how to calculate each of these losses.
These formulas assume continuous mode operation, so
they should not be used for calculating efficiency at light
load currents.
Switch loss:
Boost current loss for V
Quiescent current loss:
R
17ns = Equivalent switch current/voltage overlap time
f = Switch frequency
KELVIN
SENSE
SW
V
OUT
P
P
P
SW
Q
BOOST
= Switch resistance (≈ 0.13Ω at hot)
=
V OUT
V IN
L1
=
D2
V
C2
IN
R
=
(
SW OUT
0 001
V
.
C1
OUT
(
I
MINIMIZE D1, C3
LT1765 LOOP
D1
)
V
2
IN
(
) (
V
I
2
OUT
IN
GND
C3
V
BOOST
OUT
/
50
)
)
+
= V
17
GND
OUT
ns I
1765 F6a
:
(
C
C
OUT
KEEP FB AND V
COMPONENTS AND
TRACES AWAY FROM
HIGH FREQUENCY,
HIGH INPUT
COMPONENTS
PLACE FEEDTHROUGHS
UNDER AND AROUND
GROUND PAD FOR
GOOD THERMAL
CONDUCTIVITY
)( )( )
V
IN
f
C
1765fb