ir3832wm International Rectifier Corp., ir3832wm Datasheet
ir3832wm
Available stocks
Related parts for ir3832wm
ir3832wm Summary of contents
Page 1
... Distributed Point of Load Power Architectures • Netcom Applications Enable Vin Boot SW OCSet Fb Comp PGnd Gnd Fig. 1. Typical application diagram PD-97508 IR3832WMPbF is an easy-to-use, TM and highly efficient DC/DC providing accurate power Vo 1 ...
Page 2
... M IR3832WMTR1PbF Rev 3 Gnd COMP Gnd Rt SS OCSet PACKAGE PIN COUNT DESCRIPTION IR3832WMTRPbF 15 15 PD-97508 IR3832WMPbF and -40 C PGnd θ θ PCB - V CC PGood PARTS PER REEL 4000 750 ...
Page 3
... Block Diagram Fig. 2. Simplified block diagram of the IR3832W Rev 3.0 PD-97508 IR3832WMPbF 3 ...
Page 4
... Switch node. This pin is connected to the output inductor Input voltage connection pin. IN Supply voltage for high side driver. Connect a 0.1uF capacitor from this 13 Boot pin to SW. 14 Enable Enable pin to turn on and off the device. 15 Gnd Signal ground for internal reference and control circuitry. Rev 3.0 IR3832WMPbF Description PD-97508 4 ...
Page 5
... CC CC(Standby) V Supply Current (Dyn CC(Dyn) Under Voltage Lockout V -Start-Threshold V _UVLO_Start -Stop-Threshold V _UVLO_Stop CC CC Enable-Start-Threshold Enable_UVLO_Start Enable-Stop-Threshold Enable_UVLO_Stop Enable leakage current Ien Rev 3.0 IR3832WMPbF Min Max 1.5 16 4.5 5.5 4.5 5.5 0.6 0.90*Vin 0 4 225 1650 -40 125 <5.5V, Vp=0.6V Test Condition Min Vcc=5V, V =12V, V =0.75V, I ...
Page 6
... Vfb-Vp -5 Vp=0. 0.40 8 Note4 7 Note4 20 Note4 100 Vcc=4.5V 3.4 Note4 0 Source 14 2.7 Fs=250kHz 20.8 Fs=500kHz 43 Fs=1500kHz 136 Note4 -10 I(Boot)=30mA 180 Note4 5 PD-97508 IR3832WMPbF =12V, in TYP MAX Units 0.7 0.775 V 250 275 500 550 kHz 1500 1650 1.8 Vp-p 0 130 200 % μ ...
Page 7
... C. a Test Condition Min Note4 Note4 Fb Rising 0.660 Fb Rising Fb Falling 0.480 Fb Falling Relative to charge voltage, SS rising 2 Note4 260 I =-5mA PGood SW=0V, Enable=0V SW=0V,Enable=high,SS=3V,Vp=0V, Note4 PD-97508 IR3832WMPbF =12V, in TYP MAX Units 140 0.690 0.720 V 256/Fs S 0.510 0.540 V 256/Fs s 2.1 2.3 V 300 340 mV 0 ...
Page 8
... PD-97508 IR3832WMPbF C - 125 C) F =500 kHz Icc(Dyn 100 120 o Temp[ C] IOCSET(500kHz 100 120 o Temp[ C] Vcc(UVLO) Stop 100 120 o Temp[ C] Enable(UVLO) Stop ...
Page 9
... Rdson of MOSFETs Over Temperature at Vcc= -40 -20 0 Rev 3 Temperature [°C] Sync-FET Ctrl-FET PD-97508 IR3832WMPbF 100 120 140 9 ...
Page 10
... Typical Efficiency and Power Loss Curves Vin=12V, Vcc=5V, Vo=0.75V, Io=0.5A-4A, F Temperature, No Air Flow 0.5 1.0 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.5 1.0 Rev 3.0 =400kHz, L=1.5uH (MPO104-1R5 from Delta), Room s 1.5 2.0 2.5 Load Current (A) 1.5 2.0 2.5 Load Current (A) PD-97508 IR3832WMPbF 3.0 3.5 4.0 3.0 3.5 4.0 10 ...
Page 11
... Typical Efficiency and Power Loss Curves Vin=5V, Vcc=5V, Vo=0.75V, Io=0.5A-4A, F Temperature, No Air Flow 0.5 1.0 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.5 1.0 Rev 3.0 =400kHz, L=1.5uH (MPO104-1R5 from Delta), Room s 1.5 2.0 2.5 Load Current (A) 1.5 2.0 2.5 Load Current (A) PD-97508 IR3832WMPbF 3.0 3.5 4.0 3.0 3.5 4.0 11 ...
Page 12
... MOSFETs Fig. 3a. Normal Start up, Device turns on efficiency when the Bus voltage reaches 10.2V Figure 3b. shows the recommended start-up sequence for the non-tracking operation of IR3832W, when Enable is used as a logic input. Fig. 3b. Recommended startup sequence, Non-Tracking operation PD-97508 IR3832WMPbF . This is desirable particularly in 12 ...
Page 13
... MOSFET is internally programmed. Figure 5 shows a series of 32, 16, 8 startup pulses. Fig. 4. Pre-Bias startup Rev 3.0 IR3832WMPbF Fig. 5. Pre-Bias startup pulses Soft-Start The IR3832W has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. To ensure correct ...
Page 14
... After every soft start cycle, the converter stays in this mode until the overload or short circuit is removed. The OCP circuit starts sampling current typically OCSet 160 ns after the low gate drive rises to about 3V. This delay functions to filter out switching noise PD-97508 IR3832WMPbF 1400 = ) .......... .......... .......... .....( ) 2 Ω ...
Page 15
... C hysteresis in the thermal shutdown threshold. TIMING DIAGRAM OF PGOOD FUNCTION Fig.4A IR3832W Non-Tracking Operation Fig.8b IR3832W Tracking Operation Rev 3.0 IR3832WMPbF Power Good Output inside The IC continually monitors the output voltage via Feedback (Fb pin). The Power Good signal is flagged when the Fb pin voltage is above 0.5V and and between 85% to 115 % of Vp ...
Page 16
... Fig 9. shows a plot of the maximum duty ratio v/s the switching frequency, with 250 ns off-time 250 450 Fig. 9. Maximum duty cycle v/s switching frequency. 6 V/s PD-97508 IR3832WMPbF Duty Cycle 650 850 1050 1250 1450 1650 S w itching Frequency ( ...
Page 17
... V before the tracking reference signal is applied to the Vp pin. This can be done by choosing a small value for the soft-start capacitor to ensure that the voltage at the SS pin .....(7) rises quickly. A 0.022 uF capacitor is chosen for this purpose. PD-97508 IR3832WMPbF ⎞ ⎟ .......... .......... .......... ...
Page 18
... Where Δ Δ Duty If Δi ≈ 30%(I calculated to be 1.46μH. Select L=1.50 μH. The MPO104-1R5 ....(12) compact, low profile inductor suitable for this application. PD-97508 IR3832WMPbF .......... .......... .......... .. (13) = 0.97 A RMS Δ The ripple current can be Δ ∗ Δ = ∗ Δ t ...
Page 19
... ESR to satisfy stability requirements. In general the output capacitor’s ESR generates a zero typically at 5kHz to 50kHz which is essential for an acceptable phase margin. The ESR zero of the output capacitor is expressed as follows ESR PD-97508 IR3832WMPbF 1 .......... .......... .......... .. (16) π ∗ ...
Page 20
... III compensation network. The typically used compensation network for voltage-mode controller is shown in figure 14. Again, the transfer function is given by replacing Z ....... (21) the transfer function can be expressed as − PD-97508 IR3832WMPbF 1 .......... .......... .......... ....... (22 .......... .......... .......... ...(23 POLE * 4 + ...
Page 21
... These result to: =15.31 kHz F LC =4.4 MHz F ESR =200 kHz of the F s/2 Select crossover frequency: F Since F <F LC place the pole and zeros. PD-97508 IR3832WMPbF Output Output ESR ESR o o Capacitor Capacitor Electrolytic Electrolytic F F <F <F <F <F <F < ...
Page 22
... PGood pin, when the output voltage is not in regulation, to less than 5 mA. A typical value used is 10kΩ. = Ω R 210 10 PD-97508 IR3832WMPbF ) from the SW pin OCSET must OCSET has a positive temperature ∗ ...
Page 23
... X7R, 10% Panasonic 0603, 50V, X7R, 10% Panasonic 0603, 16V, X5R, 20% Panasonic SupIRBuck, 4A, PQFN 5x6mm International Rectifier PD-97508 IR3832WMPbF Part Number EEV-FK1E331P C3216X5R1E106M ECJ-1VB1E104K MPO104-1R5 ECJ-2FB0J226ML MCR03EZPFX4992 MCR03EZPFX7501 MCR03EZPFX3572 MCR03EZPFX2741 MCR03EZPFX1002 ECJ-1VB1E223K MCR03EZPFX3481 ECJ-1VC1H221J ECJ-1VB1E104K ECJ-1VB1H223K MCR03EZPFX6651 ERJ-3EKF2100V ECJ-1VB1H222K ECJ-1VB1H103K ECJ-BVB1C105M IR3832WMPbF 23 ...
Page 24
... Fig. 20: Output Voltage Ripple, 4A, sourcing current out Rev 3.0 Fig. 17: Start up with Prebias, 0A Load :SS Ch :PGood Fig. 19: Inductor node at -3A, sinking current, Ch Fig. 21: Short (Hiccup) Recovery out PD-97508 IR3832WMPbF :V , :SS 2 out 3 DDQ out , :PGood ...
Page 25
... TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=0.75V, Room Temperature, No Air Flow Fig. 22: Tracking 4A, sourcing current :PGood 2 out 3 DDQ 4 Fig. 24: Transient Response, 1A/us -0.5A to +0.5A load , out Rev 3.0 Fig. 23: Tracking -3A load, sinking current out : PD-97508 IR3832WMPbF : :PGood 3 DDQ 4 25 ...
Page 26
... TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=0.75V, Io=+4A, Room Temperature, No Air Flow Fig.25: Bode Plot at 4A load (sourcing current) shows a bandwidth of 65kHz and phase margin of Rev 3.0 IR3832WMPbF 60 degrees PD-97508 26 ...
Page 27
... Figure 26 illustrates the feedback implementation of the layout guidelines outlined above layer board. PGnd Vin Vin PGnd Vout Vout PD-97508 IR3832WMPbF PGnd PGnd Vout Vout Enough copper & minimum length ground path between Input and Output All bypass caps should be placed as ...
Page 28
... SupIRBuck, kept away from noise sources. Fig. 26c. IR3832W layout considerations – Mid Layer 1 Fig. 26d. IR3832W layout considerations – Mid Layer 2 Rev 3.0 PD-97508 IR3832WMPbF PGnd Power Vin Ground Plane AGnd Use separate traces for connecting Boot cap and Rocset to the ...
Page 29
... Pad lands (the 4 big pads other than the 11 IC pins) length and width should be equal to maximum part pad length and width. However, the minimum metal to metal spacing should be no less than 0.17mm for 2 oz. Copper; no less than 0.1mm for 1 oz. Copper and no less than 0.23mm for 3 oz. Copper. Rev 3.0 PD-97508 IR3832WMPbF 29 ...
Page 30
... Ensure that the solder resist in-between the lead lands and the pad land is ≥ 0.15mm due to the high aspect ratio of the solder resist strip separating the lead lands from the pad land. Rev 3.0 PD-97508 IR3832WMPbF 30 ...
Page 31
... The maximum length and width of the land pad stencil aperture should be equal to the solder resist opening minus an annular 0.2mm pull back to decrease the incidence of shorting the center land to the lead lands when the part is pushed into the solder paste. Rev 3.0 PD-97508 IR3832WMPbF 31 ...
Page 32
... IR WORLD HEADQUARTERS: This product has been designed and qualified for the Consumer market Rev 3.0 IR3832WMPbF BOTTOM VIEW 233 Kansas St., El Segundo, California 90245, USA Tel: (320) 252-7105 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 01/09 ...