adr391 Analog Devices, Inc., adr391 Datasheet - Page 16

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adr391

Manufacturer Part Number
adr391
Description
Micropower, Low Noise Precision Voltage References With Shutdown
Manufacturer
Analog Devices, Inc.
Datasheet

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ADR390/ADR391/ADR392/ADR395
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage and low power voltage reference applications,
and the ADR390/ADR391/ADR392/ADR395 are no exception.
The uniqueness of these devices lies in the architecture. As
shown in Figure 40, the ideal zero TC band gap voltage is
referenced to the output, not to ground. Therefore, if noise
exists on the ground line, it is greatly attenuated on V
band gap cell consists of the PNP pair, Q51 and Q52, running at
unequal current densities. The difference in V
voltage with a positive TC, which is amplified by a ratio of
This PTAT voltage, combined with V
produces a stable band gap voltage.
Reduction in the band gap curvature is performed by the ratio
of the resistors R44 and R59, one of which is linearly
temperature dependent. Precision laser trimming and other
patented circuit techniques are used to further enhance the
drift performance.
2 ×
SHDN
R58
R54
Figure 40. Simplified Schematic
Q51
R59
R54
R60
Q1
R53
R44
R58
Q52
R61
R49
R48
BE
s of Q51 and Q52,
GND
V
V
V
IN
OUT (FORCE)
OUT (SENSE)
BE
results in a
OUT
. The
Rev. F | Page 16 of 20
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR390/ADR391/ADR392/ADR395 are capable of deli-
vering load currents to 5 mA, with an input voltage that ranges
from 2.8 V (ADR391 only) to 15 V. When these devices are
used in applications with large input voltages, care should be
taken to avoid exceeding the specified maximum power
dissipation or junction temperature because it could result in
premature device failure. The following formula should be used
to calcu-late a device’s maximum junction temperature or
dissipation:
In this equation, T
ambient temperatures. P
θ
SHUTDOWN MODE OPERATION
The ADR390/ADR391/ADR392/ADR395 include a shutdown
feature that is TTL/CMOS level compatible. A logic low or a
zero volt condition on the SHDN pin is required to turn the
devices off. During shutdown, the output of the reference
becomes a high impedance state, where its potential would then
be determined by external circuitry. If the shutdown feature is
not used, the SHDN pin should be connected to V
JA
is the device package thermal resistance.
P
D
=
T
J
θ
JA
T
A
J
and T
D
A
is the device power dissipation, and
are, respectively, the junction and
IN
(Pin 2).

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