ad5171 Analog Devices, Inc., ad5171 Datasheet - Page 13

• Manufacturer Part Number: ad5171
• Description: 64-position Otp Digital Potentiometer
• Manufacturer: Analog Devices, Inc.

An alternate approach in 3.5 V to 5.25 V systems adds a signal
diode between the system supply and the OTP supply for
isolation, as shown in Figure 26.
Operating Supply. The V
When operating at 2.7 V, use of the bidirectional low threshold
P-Ch MOSFETs is recommended for the supply’s isolation. As
shown in Figure 27, this assumes that the 2.7 V system voltage
is applied first, and the P1 and P2 gates are pulled to ground,
thus turning on P1 and, subsequently, P2. As a result, V
AD5171 approaches 2.7 V. When the AD5171 setting is found,
the factory tester applies the V
MOSFETs gates, thus turning off P1 and P2. The OTP
command should be executed at this time to program the
AD5171 while the 2.7 V source is protected. Once the fuse
programming is complete, the tester withdraws the V
the AD5171’s setting is permanently fixed.
AD5171 achieves the OTP function through blowing internal
fuses. Users should always apply the 5.25 V to 5.5 V one-time
program voltage requirement at the first fuse programming
attempt. Failure to comply with this requirement may lead to
a change in the fuse structures, rendering programming
inoperable.
Figure 27. 5.5 V OTP Supply Isolated From the 2.7 V Normal Operating
Figure 26. 5.5 V OTP Supply Isolated From the 3.5 V to 5.25 V Normal
Supply. The V
2.7V
3.5V–5.25V
5.5V
5.5V
10kΩ
250kΩ
R1
P1 = P2 = FDV302P, NDS0610
50kΩ
DD_OTP
R2
R1
Figure 25. Power Supply Requirement
5.5V
P1
DD_OTP
APPLY FOR OTP ONLY
supply must be removed once OTP is complete.
APPLY FOR OTP ONLY
J1
D1
CONNECT J1
HERE AFTER OTP
P2
supply must be removed once OTP is complete.
CONNECT J1
HERE FOR OTP
C1
10µF
C1
10µF
DD_OTP
C1
10µF
C2
1nF
C2
1nF
to both the V
C2
1nF
V
V
AD5171
AD5171
DD
DD
V
AD5171
DD
DD
and the
DD_OTP
DD
of the
and
Rev. B | Page 13 of 24
Care should be taken when SCL and SDA are driven from a low
voltage logic controller. Users must ensure that the logic high
level is between 0.7 V × V
for Different Voltage Operation section.
Poor PCB layout introduces parasitics that may affect the fuse
programming. Therefore, it is recommended that a 10 µF
tantalum capacitor be added in parallel with a 1 nF ceramic
capacitor as close as possible to the V
chosen for both capacitors are important. This combination of
capacitor values provides both a fast response and larger supply
current handling with minimum supply droop during transients.
As a result, these capacitors increase the OTP programming
success by not inhibiting the proper energy needed to blow the
internal fuses. Additionally, C1 minimizes transient disturbance
and low frequency ripple while C2 reduces high frequency noise
during normal operation.
ESD PROTECTION
Digital inputs SDA and SCL are protected with a series input
resistor and parallel Zener ESD structures (Figure 28).
TERMINAL VOLTAGE OPERATING RANGE
There are also ESD protection diodes between V
RDAC terminals; therefore, the V
voltage boundary conditions (see Figure 29). Supply signals
present on Terminal A, Terminal B, and Terminal W that exceed
V
should be avoided.
DD
are clamped by the internal forward-biased diodes and
Figure 29. Maximum Terminal Voltages Set by V
Figure 28. ESD Protection of Digital Pins
340Ω
DD
and V
LOGIC
DD
DD
of the AD5171 defines their
. Refer to the Level Shifting
DD
pin. The type and value
V
A
W
B
GND
DD
DD
and the
DD
AD5171