ad5415 Analog Devices, Inc., ad5415 Datasheet
ad5415
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ad5415 Summary of contents
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... DAC register via the SDO pin. On power-up, the internal shift register and latches are filled with 0s, and the DAC outputs are at zero scale. The AD5415 DAC is available in a 24-lead TSSOP package. 1 U.S. Patent Number 5,689,257. ...
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... Changes to Figure 36 Through Figure 38.................................... 17 Changes to Table 7 Through Table 10.......................................... 19 Added ADSP-BF5xx-to-AD5415 Interface Section................... 22 Change to 80C51/80L51-to-AD5415 Interface Section ............ 23 Change to MC68HC11-to-AD5415 Interface Section .............. 23 Change to Power Supplies for the Evaluation Board Section ... 24 Changes to Table 13........................................................................ 28 Updated Outline Dimensions ....................................................... 29 Changes to Ordering Guide .......................................................... 29 7/04— ...
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... Rev Page AD5415 unless MIN MAX Conditions Guaranteed monotonic Data = 0x0000 25° OUT Data = 0x0000 −40°C to +125° OUT Input resistance TC = −50 ppm/°C Typ = 25°C, max = 125°C Input resistance TC = − ...
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... AD5415 Parameter Digital Feedthrough Output Noise Spectral Density Analog THD Digital THD 100 kHz f OUT 50 kHz f OUT SFDR Performance (Wide Band) Clock = 10 MHz 500 kHz f OUT 100 kHz f OUT 50 kHz f OUT Clock = 25 MHz 500 kHz f OUT 100 kHz f OUT 50 kHz f OUT ...
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... Consists of cycle time, SYNC high time, data setup, and output voltage settling time DB0 t 9 Figure 2. Standalone Mode Timing Diagram Rev Page )/ unless otherwise noted. MIN MAX AD5415 = 2 5.5 V, ...
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... AD5415 SCLK t 4 SYNC t 5 DB15 SDIN (N) SDO NOTES 1. ALTERNATIVELY, DATA CAN BE CLOCKED INTO THE INPUT SHIFT REGISTER ON THE RISING EDGE OF SCLK AS DETERMINED BY THE CONTROL BITS. IN THIS CASE, DATA IS CLOCKED OUT OF SDO ON THE FALLING EDGE OF SCLK. TIMING IS AS ABOVE, WITH SCLK INVERTED. ...
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... Exposure to absolute ±10 mA maximum rating conditions for extended periods may affect −0 0 device reliability. −40°C to +125°C −65°C to +150°C 150°C 128°C/W 300°C 235°C Rev Page AD5415 ...
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... I 1B OUT OUT OUT OUT R1A 4 21 R1B 5 20 R2A R2B AD5415 R2_3A 6 19 R2_3B TOP VIEW (Not to Scale) R3A R3B REF REF GND LDAC 10 15 CLR SCLK ...
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... REFERENCE VOLTAGE Figure 9. DNL vs. Reference Voltage 2. 10V REF –40 – 100 TEMPERATURE (°C) Figure 10. Gain Error vs. Temperature 2.5V DD 1.5 2.0 2.5 3.0 3.5 4.0 0 0.5 1.0 INPUT VOLTAGE (V) Figure 11. Supply Current vs. Logic Input Voltage AD5415 9 10 120 140 T = 25°C A 4.5 5.0 ...
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... AD5415 1.6 1.4 1.2 I OUT 1.0 0.8 I OUT 0.6 0.4 0.2 0 –40 – TEMPERATURE (°C) Figure 12 Leakage Current vs. Temperature out 0.50 0. 0.40 0.35 0.30 0. 2.5V DD 0.20 0.15 ALL 1s ALL 0s 0.10 0.05 0 –60 –40 – TEMPERATURE (°C) Figure 13. Supply Current vs. Temperature 25°C A LOADING 100 ...
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... OUT Figure 22. Wideband SFDR vs. f Frequency OUT MCLK = 5MHz MCLK = 10MHz MCLK = 25MHz T = 25° REF AMP = AD8038 0 100 200 300 400 500 600 700 800 f (kHz) OUT Figure 23. Wideband SFDR vs. f Frequency OUT AD5415 1M = 3.5V 180 200 = 3.5V 900 1000 ...
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... AD5415 0 –10 –20 –30 –40 –50 –60 –70 –80 – FREQUENCY (MHz) Figure 24. Wideband SFDR 100 kHz, Clock = 25 MHz OUT 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (MHz) Figure 25. Wideband SFDR 500 kHz, Clock = 10 MHz ...
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... AMP = AD8038 250 65k CODES 200 150 100 50 0 100 350 400 Rev Page AD5415 T = 25°C A ZERO SCALE LOADED TO DAC AMP = AD8038 MIDSCALE LOADED TO DAC FULL SCALE LOADED TO DAC 1k 10k FREQUENCY (Hz) Figure 31. Output Noise Spectral Density 100k ...
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... AD5415 TERMINOLOGY Relative Accuracy (Endpoint Nonlinearity) A measure of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function measured after adjusting for zero scale and full scale and is normally expressed in LSB percentage of the full-scale reading. Differential Nonlinearity The difference in the measured change and the ideal 1 LSB change between two adjacent codes ...
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... GENERAL DESCRIPTION DAC SECTION The AD5415 is a 12-bit, dual-channel, current output DAC consisting of standard inverting R-2R ladder configuration. Figure 32 shows a simplified diagram of a single channel of the AD5415. The feedback resistor R has a value of 2R. The value typically 10 kΩ (with a minimum of 8 kΩ and a maximum of 12 kΩ ...
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... internal diode turns on, causing the device to exceed the maximum ratings. In this type of application, the full range of multiplying capability of the DAC is lost. Rev Page OUT AD5415 – OUT OUT AGND SCLK ...
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... OUT V A REF I 2A OUT GND NOTES 1. ADDITIONAL PINS OMITTED FOR CLARITY. Figure 38. Current-Steering DAC Used as a Divider or Programmable Gain Element to 16 terminal, the output voltage OUT A terminal. REF AD5415 V OUT . However —an error REF ...
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... AD5415 REFERENCE SELECTION When selecting a reference for use with the AD54xx series of current output DACs, pay attention to the reference’s output voltage temperature coefficient specification. This parameter not only affects the full-scale error, but also can affect the linearity (INL and DNL) performance. The reference tempera- ture coefficient should be consistent with the system accuracy specifications ...
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... TSOT-23, SC70 1 10 SOIC TSOT-23, SC70 0.8 3.5 SOIC-8 0.8 8 SOIC-8 0.12 5 TSOT-23 0.12 8 TSOT-23 Supply Current (μA) Package 600 SOIC-8 500 MSOP, SOIC-8 975 MSOP, SOIC-8 50 TSOT 850 TSOT, SOIC-8 I (Max) (nA) Package B 6,000 SOIC-8, SOT-23, MSOP 10,500 SOIC-8, MSOP 750 SOIC-8, SC70-5 7,000 SOIC-8 AD5415 ...
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... AD5415 SERIAL INTERFACE The AD5415 has an easy to use 3-wire interface that is compatible with SPI, QSPI, MICROWIRE, and most DSP interface standards. Data is written to the device in 16-bit words. Each 16-bit word consists of four control bits and 12 data bits, as shown in Figure 39. Low Power Serial Interface ...
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... DAC is updated on the 16th clock falling edge when the device is in standalone mode the rising edge of SYNC when the device is in daisy-chain mode. Software LDAC Function Load-and-update mode also functions as a software update function, irrespective of the voltage level on the LDAC pin. Rev Page AD5415 ...
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... ADSP-BF5xx-to-AD5415 Interface The ADSP-BF5xx family of processors has an SPI-compatible port that enables the processor to communicate with SPI- compatible devices. A serial interface between the BlackFin® processor and the AD5415 DAC is shown in Figure 43. In this 1 AD5415 configuration, data is transferred through the MOSI (master SYNC output, slave input) pin ...
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... DAC. The SYNC signal is derived from a port line (PC7). When data is being transmitted to the AD5415, the SYNC line is taken low (PC7). Data appearing on the MOSI output is valid on the falling edge of SCK. Serial data from the 68HC11 is transmitted in 8-bit bytes with only eight falling clock edges occurring in the transmit cycle ...
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... The printed circuit board on which the AD5415 is mounted should be designed so that the analog and digital sections are separated and confined to certain areas of the board. If the DAC system where multiple devices require an AGND-to-DGND connection, the connection should be made at one point only ...
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... Figure 49. Schematic of the AD5415 Evaluation Board Rev Page AD5415 ...
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... AD5415 Figure 50. Component-Side Artwork Figure 51. Silkscreen—Component-Side View (Top) Rev Page ...
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... Figure 52. Solder-Side Artwork Rev Page AD5415 ...
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... AD5428 8 2 AD5429 8 2 AD5450 8 1 AD5432 10 1 AD5433 10 1 AD5439 10 2 AD5440 10 2 AD5451 10 1 AD5443 12 1 AD5444 12 1 AD5415 12 2 AD5405 12 2 AD5445 12 2 AD5447 12 2 AD5449 12 2 AD5452 12 1 AD5446 14 1 AD5453 14 1 AD5553 14 1 AD5556 14 1 AD5555 ...
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... OUTLINE DIMENSIONS 0.15 0.05 ORDERING GUIDE Model Resolution AD5415YRU 12 AD5415YRU-REEL 12 AD5415YRU-REEL7 12 1 AD5415YRUZ 12 1 AD5415YRUZ-REEL 12 1 AD5415YRUZ-REEL7 12 EVAL-AD5415EB Pb-free part. 7.90 7.80 7. 4.50 4.40 4.30 6.40 BSC 1 12 PIN 1 0.65 1.20 BSC MAX 0.30 0.20 SEATING 0.19 PLANE 0.09 0.10 COPLANARITY COMPLIANT TO JEDEC STANDARDS MO-153-AD Figure 53. 24-Lead Thin Shrink Small Outline Package [TSSOP] (RU-24) Dimensions shown in millimeters ...
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... AD5415 NOTES Rev Page ...
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... NOTES Rev Page AD5415 ...
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... AD5415 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04461–0–7/05(A) Rev Page ...