ad5669rbruz Analog Devices, Inc., ad5669rbruz Datasheet

ad5669rbruz

Manufacturer Part Number

ad5669rbruz

Description

Octal, 12-/16-bit Dac, I C , 5ppm/

Manufacturer

Analog Devices, Inc.

Datasheet

1.AD5669RBRUZ.pdf (33 pages)

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Preliminary Technical Data

FEATURES

Low power, smallest-pin-compatible octal DACs

4mm X 4mm 16-lead LFCSP and 16-lead TSSOP

User selectable on-chip 1.25 V/2.5 V, 5 ppm/°C reference

Power down to 400 nA @ 5 V, 200 nA @ 3 V

2.7 V to 5.5 V power supply

Guaranteed monotonic by design

Power-on reset to zero scale or midscale

3 power-down functions

Hardware LDAC and CLR functions

APPLICATIONS

Process control

Data acquisition systems

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

GENERAL DESCRIPTION

The AD5629R/AD5669R devices are low power, octal, 12-/16-

bit, buffered voltage-output DACs. All devices operate from a

single 2.7 V to 5.5 V supply and are guaranteed monotonic by

design.

The AD5629R/AD5669R has an on-chip reference with an

internal gain of 2. The AD5629R/AD5669R has a user selectable

1.25 V 5 ppm/°C reference, giving a full-scale output range of

2.5 V or a 2.5 V 5 ppm/°C reference, giving a full-scale output

range of 5 V depending on the option selected. The on-chip

reference is off at power-up, allowing the use of an external refer-

ence. The internal reference is enabled via a software write. The

AD5669/AD5629 require an external reference voltage to set

the output range of the DAC.

The part incorporates a power-on reset circuit that ensures that the

DAC output powers up to 0 V (AD5629R/AD5669R) or midscale

Rev. PrA

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

C-compatible serial interface supports standard (100 kHz)

AD5669R: 16 bits

AD5629R: 12 bits

and fast (400 kHz) modes

Octal, 12-/16-Bit DAC, I

Chip Reference in 4mm X 4mm LFCSP

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

(AD5669R-3) and remains powered up at this level until a valid

write takes place. The part contains a power-down feature that

reduces the current consumption of the device to 400 nA at 5 V

and provides software-selectable output loads while in power-

down mode for any or all DAC channels.

FUNCTIONAL BLOCK DIAGRAM

PRODUCT HIGHLIGHTS

S C L

SDA

A D 5 6 2 9R/AD5669R

Octal, 12-/16-bit DAC.

On-chip 1.25 V/2.5 V, 5 ppm/°C reference.

Available in 16-lead LFCSP/16-lead TSSOP.

Power-on reset to 0 V or midscale.

Power-down capability. When powered down, the DAC

typically consumes 200 nA at 3 V and 400 nA at 5 V.

L D A C

IN T E R F A C E

L O G IC

L D A C

C L R

R E G IS T E R

P O W E R -O N

IN P U T

R E S E T

AD5629R/AD5669R

D D

Figure 1

R E G IS T E R

D A C

, 5ppm/°C On-

R E FIN

S T R IN G

D A C A

D A C B

D A C C

D A C D

D A C E

D A C F

D A C G

D A C H

R E FO U T

1.25V /2.5V

R E F

B U F F E R

www.analog.com

P O W E R -D O W N

L O G IC

G N D

O U T

Related parts for ad5669rbruz

ad5669rbruz Summary of contents

AD5629R/AD5669R TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Characteristics ........................................................................ 7 I2C Timing Characteristics ......................................................... 8 Absolute ...

Page 3

AD5629R/AD5669R SPECIFICATIONS kΩ to GND Table 1. Parameter Min 2 STATIC PERFORMANCE AD5629R Resolution 12 Relative Accuracy Differential Nonlinearity AD5669R Resolution 16 Relative Accuracy Differential Nonlinearity Zero-Code ...

Page 4

AD5629R/AD5669R Parameter Min Input Low Voltage, V INL Input High Voltage INH Pin Capacitance POWER REQUIREMENTS V 4 (Normal Mode 5.5 ...

Page 5

AD5629R/AD5669R kΩ to GND Table 2. Parameter Min STATIC PERFORMANCE 2 AD5629R Resolution 12 Relative Accuracy Differential Nonlinearity AD5669R Resolution 16 Relative Accuracy Differential Nonlinearity Zero-Code Error ...

Page 6

AD5629R/AD5669R Parameter Min 4 I (Normal Mode (All Power-Down Modes 2 3 Temperature ...

Page 7

AD5629R/AD5669R AC CHARACTERISTICS kΩ to GND Table Parameter Output Voltage Settling Time Slew Rate Digital-to-Analog Glitch Impulse Digital Feedthrough Reference Feedthrough Digital Crosstalk Analog ...

Page 8

AD5629R/AD5669R I2C TIMING CHARACTERISTICS 5.5 V; all specifications T DD Table 4. Parameter Conditions 1 f Standard mode SCL Fast mode t Standard mode 1 Fast mode t Standard mode 2 Fast mode t Standard ...

Page 9

AD5629R/AD5669R t 2 SCL SDA LDAC* CLR *ASYNCHRONOUS LDAC UPDATE MODE Figure2. Serial Write Operation Rev. PrA ...

Page 10

AD5629R/AD5669R ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter Rating V to GND −0 Digital Input Voltage to GND −0 GND −0 ...

Page 11

AD5629R/AD5669R PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS R/29R OUT OUT OUT Figure 2. 16-Lead LFCSP (CP-16-17) Table 6. Pin Function Descriptions Pin ...

Page 12

AD5629R/AD5669R TYPICAL PERFORMANCE CHARACTERISTICS Figure 4. INL AD5669R—External Reference Figure 5. INL AD5629R—External Reference Figure 6. DNL AD5669R—External Reference Preliminary Technical Data Figure 7. DNL AD5629R—External Reference Figure 8. INL AD5669R-2/AD5669R-3 Figure 10. INL AD5629R-2 Rev. PrA | Page 12 ...

Page 13

AD5629R/AD5669R Figure 11. DNL AD5669R-2/AD5669R-3 Figure 12. DNL AD5629R-2 Figure 13. INL AD5669R-1 Preliminary Technical Data Figure 14. INL AD5629R-1 Figure 15. DNL AD5629R-1 Rev. PrA | Page ...

Page 14

AD5629R/AD5669R Figure 16. Figure 17. Gain Error and Full-Scale Error vs. Temperature Figure 18. Figure 19. Zero-Scale Error and Offset Error vs. Temperature Preliminary Technical Data Figure 21. Gain Error and Full-Scale Error vs. Supply Voltage Figure 23. Zero-Scale Error ...

Page 15

AD5629R/AD5669R Figure 24. Figure 25. I Histogram with External Reference DD Figure 26. I Histogram with Internal Reference DD Preliminary Technical Data Figure 28. Headroom at Rails vs. Source and Sink Figure 30. AD5669R-2/AD5669R-3 Source and Sink Capability Rev. PrA ...

Page 16

AD5629R/AD5669R Figure 31. Figure 32. AD5669R-1 Source and Sink Capability Figure 33. Figure 34. Supply Current vs. Code Preliminary Technical Data Figure 36. Supply Current vs. Temperature Figure 38. Supply Current vs. Supply Voltage Rev. PrA | Page 16 of ...

Page 17

AD5629R/AD5669R Figure 39. Figure 40. Supply Current vs. Logic Input Voltage Figure 41. Figure 42. Full-Scale Settling Time Preliminary Technical Data Figure 43. Power-On Reset Figure 45. Power-On Reset to Midscale Rev. PrA | Page ...

Page 18

AD5629R/AD5669R Figure 46. Figure 47. Exiting Power-Down to Midscale Figure 48. Figure 49. Digital-to-Analog Glitch Impulse (Negative) Preliminary Technical Data Figure 51. Analog Crosstalk Figure 53. DAC-to-DAC Crosstalk Rev. PrA | Page Figure 50. Figure 52. ...

Page 19

AD5629R/AD5669R Figure 54. Figure 55. 0 Output Noise Plot, External Reference Figure 56 Figure 57. 0 Output Noise Plot, Internal Reference Preliminary Technical Data Figure 59. 0 Output ...

Page 20

AD5629R/AD5669R Figure 62. Figure 63. Total Harmonic Distortion Figure 64. Figure 65. Settling Time vs. Capacitive Load Preliminary Technical Data Figure 67. Hardware CLR Figure 69. Multiplying Bandwidth Rev. PrA | Page Figure 66. Figure 68. ...

Page 21

AD5629R/AD5669R TERMINOLOGY Relative Accuracy For the DAC, relative accuracy, or integral nonlinearity (INL measure of the maximum deviation in LSBs from a straight line passing through the endpoints of the DAC transfer function. Figure 4 to Figure 5, ...

Page 22

AD5629R/AD5669R DAC-to-DAC crosstalk is the glitch impulse transferred to the output of one DAC due to a digital code change and subsequent output change of another DAC. This includes both digital and analog crosstalk measured by loading one ...

Page 23

AD5629R/AD5669R THEORY OF OPERATION D/A SECTION The AD5629R/AD5669R are fabricated on a CMOS process. The architecture consists of a string of DACs followed by an output buffer amplifier. Each part includes an internal 1.25 V/2 ppm/°C reference with ...

Page 24

AD5629R/AD5669R OUTPUT AMPLIFIER The output buffer amplifier can generate rail-to-rail voltages on its output, which gives an output range amplifier is capable of driving a load of 2 kΩ in parallel with 1000 pF to ...

Page 25

AD5629R/AD5669R ...

Page 26

AD5629R/AD5669R Table 8. Command Definitions Command Description Write to Input Register Update DAC Register Write to Input Register n, update all (software ...

Page 27

AD5629R/AD5669R INPUT SHIFT REGISTER The input shift register is 24 bits wide. Data is loaded into the device as a 24-bit word under the control of a serial clock input, SCL. The timing diagram for this operation is shown in ...

Page 28

AD5629R/AD5669R 0 1 2.5V interenal reference Internal reference off 1 1 1.25V internal reference on Table 14 for the contents of the input shift register during power- down/power-up operation. When using the internal reference, only all channel ...

Page 29

AD5629R/AD5669R Table 10. Internal Reference Register Internal REF Register (DB0 Table 11. 32-Bit Input Shift Register Contents for Reference Set-Up Command DB23 DB22 DB21 DB20 DB19 Command bits (C3 to C0) Address bits ...

Page 30

AD5629R/AD5669R 1 0 0xFFFF operation Table 16. 32-Bit Input Shift Register Contents for Clear Code Function DB23 DB22 DB21 DB20 DB19 Command bits (C3 to C0) LDAC FUNCTION The outputs of all ...

Page 31

AD5629R/AD5669R Table 17. LDAC Register Load DAC Register LDAC Bits (DB7 to DB0) LDAC Pin 0 1/0 1 X—don’t care Table 18. 32-Bit Input Shift Register Contents for LDAC Register Function DB23 DB22 DB21 DB20 DB19 ...

Page 32

AD5629R/AD5669R OUTLINE DIMENSIONS PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE 0.15 0.05 4.10 0.35 4.00 SQ 0.30 3.90 0.25 13 0.65 12 BSC 9 8 0.45 TOP VIEW BOTTOM VIEW 0.40 0.35 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 ...

Page 33

... AD5669RARUZ −40°C to +105°C AD5669RARUZ-3 1 −40°C to +105°C 1 AD5669RBRUZ −40°C to +105°C EVAL-AD5669REBZ-RU EVAL-AD5669REBZ- Pb-free part. © 2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...

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