ad5258 Analog Devices, Inc., ad5258 Datasheet - Page 18

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ad5258

Manufacturer Part Number
ad5258
Description
Nonvolatile, I2c-compatible 64-position, Digital Potentiometer
Manufacturer
Analog Devices, Inc.
Datasheet

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AD5258
TOLERANCE READBACK MODES
Table 15. Traditional Readback of Tolerance (Individually)
Table 16. Traditional Readback of Tolerance (Consecutively)
S
Calculating R
The AD5258 features a patented R
nonvolatile memory. Tolerance is stored in the memory during
factory production and can be read by users at any time. The
knowledge of stored tolerance allows users to accurately calcu-
late R
and open-loop applications where knowledge of absolute
resistance is critical.
The stored tolerance resides in the read-only memory and is
expressed as a percentage. The tolerance is stored in two memory
location bytes in sign magnitude binary form (see Figure 39). The
two EEPROM address bytes are 11110 (sign + integer) and 11111
(decimal number). The two bytes can be individually accessed
with two separate commands (see Table 15). Alternatively, read-
back of the first byte followed by the second byte can be done
in one command (see Table 16). In the latter case, the memory
pointer automatically increments from the first to the second
EEPROM location (increments from 11110 to 11111) if read
consecutively.
S
S
7-Bit Device Address
Slave Address Byte
7-Bit Device Address
7-Bit Device Address
AB
(See Table 5)
. This feature is valuable for precision, rheostat mode,
Slave Address Byte
Slave Address Byte
(See Table 5)
(See Table 5)
AB
Tolerance Stored in Read-Only Memory
A
SIGN
SIGN
D7
0 SA 0 0 1 1 1 1 1 0 SA S
D6
2
Instruction Byte
6
Figure 39. Format of Stored Tolerance in Sign Magnitude Format with Bit Position Descriptions
SEVEN BITS FOR AN INTEGER NUMBER
0 SA 0 0 1 1 1 1 1 0 SA S
0 SA 0 0 1 1 1 1 1 1 SA S
D5
2
AB
5
tolerance storage in the
D4
Instruction Byte
Instruction Byte
2
4
Repeat Start
D3
2
3
D2
2
(Unit is Percent; Only Data Bytes are Shown)
2
7-Bit Device Address
Slave Address Byte
D1
2
(See Table 5)
1
Repeat Start
Repeat Start
D0
Rev. A | Page 18 of 24
2
0
A
7-Bit Device Address
7-Bit Device Address
Slave Address Byte
Slave Address Byte
(See Table 5)
(See Table 5)
1 SA D7 D6 D5 D4 D3 D2 D1 D0 MA D7 D6 D5 D4 D3 D2 D1 D0 NA P
In the first memory location, the MSB is designated for the sign
(0 = + and 1 = −) and the seven LSBs are designated for the integer
portion of the tolerance. In the second memory location, all eight
data bits are designated for the decimal portion of tolerance. Note
that the decimal portion has a limited accuracy of only 0.1%. For
example, if the rated R
Address 11110 shows 0001 1100 and from Address 11111 shows
0000 1111, the tolerance can be calculated as
MSB: 0 = +
Next 7 MSB: 001 1100 = 28
8 LSB: 0000 1111 = 15 × 2
Tolerance = 28.06%
Rounded Tolerance = 28.1% and therefore
R
D7
2
–1
AB_ACTUAL
2
D6
EIGHT BITS FOR A DECIMAL NUMBER
–2
Sign + Integer Byte
= 12.810 kΩ
2
D5
–3
2
D4
–4
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
2
D3
–5
AB
= 10 kΩ and the data readback from
–8
2
D2
–6
= 0.06
Sign + Integer Byte
2
D1
–7
Decimal Byte
2
D0
–8
Decimal Byte
A

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