a114-b PulseCore Semiconductor, a114-b Datasheet - Page 4

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a114-b

Manufacturer Part Number
a114-b
Description
Timing-safe? Peak Emi Reduction Ic
Manufacturer
PulseCore Semiconductor
Datasheet
May 2008
rev 0.5
Pin Configuration
Pin Description for ASM3P623S00E
Notes: 1.Weak pull down
Pin #
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
2. Weak pull-down on all outputs
3. Weak pull-up on these Inputs
4. Buffered clock output is Timing-Safe™
Pin Name
DLY_CTRL
CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLKOUT6
CLKOUT7
CLKOUT
CLKIN
SSON
SS%
GND
GND
V
V
DD
DD
3
1
3
2
2
2
2
2
2
2
2
Type
O
P
P
O
O
O
O
O
P
P
O
O
O
I
I
I
DLY_CTRL
CLKOUT3
CLKOUT2
CLKOUT1
Notice: The information in this document is subject to change without notice.
CLKIN
Table. Has an internal pull up resistor
External Input-Output Delay control
pull up resistor
3.3V supply
SS%
GND
External reference Clock input, 5V tolerant input
Buffered clock output
3.3V supply
Spread Spectrum Selection. Refer Spread Spectrum Control and Input-Output Skew
Ground
Buffered clock output
Buffered clock output
Spread Spectrum enable and disable option. When SSON is HIGH, the spread
spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal
Buffered clock output
Buffered clock output
Ground
Buffered clock output
Buffered clock output
Buffered clock output
VDD
Timing-Safe™ Peak EMI Reduction IC
5
6
8
1
3
4
7
2
ASM3P623S00E
4
4
4
4
4
4
4
4
14
16
15
13
12
11
10
9
CLKOUT7
CLKOUT6
VDD
CLKOUT5
CLKOUT4
CLKOUT
GND
SSON
Description
.
ASM3P623S00B/E
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