cs8130 Cirrus Logic, Inc., cs8130 Datasheet - Page 13
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cs8130
Manufacturer Part Number
cs8130
Description
Multi-standard Infrared Transceiver
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS8130.pdf
(28 pages)
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Control Data Byte Format
It is essential that all reserved registers and bits are not changed from their reset state. If reserved bits
are changed, then internal test modes may be invoked, which may change some input pins to output
pins, and may completely change the definition of some functions and signals. Reserved bits in regis-
ters, and reserved registers, may not return a known state when read, and should be ignored. Registers
28 and 15 are read only. Other non-reserved registers are write only. The CS8130 can be set to echo
back register write commands to verify correct reception of the control settings.
DS134PP2
DS134F1
AD3-0
CD3-0
BIT
Register Address
(4 bits of
transmitted address
+ MSB, which is the
shadow (SHDW) bit
state [Control Reg
#3]. All registers
have 4 data bits).
Control Data
AD3
D7
NAME
AD2
D6
AD1
D5
AD0
D4
0_0000
0_0001
0_0010
0_0100
0_0101
0_1000
0_1001
0_1010
1_0000
1_0001
1_0010
1_0100
1_0101
1_1000
1_1001
1_1010
0_0011
0_0110
0_0111
0_1011
0_1100
0_1101
0_1110
1_0011
1_0110
1_0111
1_1011
1_1100
1_1101
1_1110
0_1111
1_1111
CD3
D3
VALUE
CD2
D2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
D1
CD1
Control register #1
Control register #2
Transmit Mode Register #1
Transmit Mode Register #2
Output Power register
Receive Mode register
Receive Sensitivity register #1
Receive Sensitivity register #2
Baud Rate Divider register #1
Baud Rate Divider register #2
Modulator Divider register #1
Modulator Divider register #2
Digital Output Pin Control register
Control Register #3
Reserved
Status register (read only)
TV Remote Receive Sample Rate & T Period Divider
TV Remote Receive Sample Rate & T Period Divider
TV Remote Receive Sample Rate & T Period Divider
TV Remote Transmit Bit Rate Divider #1
TV Remote Transmit Bit Rate Divider #2
Control Register #4
Reserved
Reserved
ASK Receive Timing Sensitivity register
Reserved
Reserved
Reserved
CS8130 Revision Level register (Read Only)
Reserved
Reserved (Resets to 1111; must not be changed)
Reserved (Resets to 1111; must not be changed)
Contains control register data.
D0
CD0
FUNCTION
CS8130
CS8130
13
13