cs47028-dqz Cirrus Logic, Inc., cs47028-dqz Datasheet - Page 4
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cs47028-dqz
Manufacturer Part Number
cs47028-dqz
Description
System-on- A-chip Asoc Processors
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS47028-DQZ.pdf
(40 pages)
CS470xx Data Sheet
Audio SOC Processor Family
6. Ordering Information ............................................................................................................33
7. Environmental, Manufacturing, & Handling Information ..................................................33
8. Device Pinout Diagram .........................................................................................................34
9. 100-pin LQFP with Exposed Pad Package Drawing .........................................................36
10. Parameter Definitions .........................................................................................................38
11. Revision History ..................................................................................................................39
Figures
Figure 1. CS47048 Top-Level Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 2. CS47028 Top-Level Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 3. CS47024 Top-Level Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4. RESET Timing at Power-On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 5. RESET Timing after Power is Stable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 6. XTI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 7. Serial Control Port - SPI Slave Mode Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 8. Serial Control Port - SPI Master Mode Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 9. Serial Control Port - I
Figure 10. Serial Control Port - I
Figure 11. Digital Audio Input (DAI) Port Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 12. Digital Audio Output Port Timing, Master Mode . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 13. Digital Audio Output Port Timing, Slave Mode . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 14. ADC Single-Ended Input Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 15. ADC Differential Input Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 16. DAC Single-Ended Output Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 17. DAC Differential Output Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 18. Maximum Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 19. CS47048 Pinout Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 20. CS47028 Pinout Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 21. CS47024 Pinout Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 22. 100-Pin LQFP Package Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Tables
Table 1. CS470xx Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. CS470xx Device Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
8.1 CS47048, 100-Pin LQFP Pinout Diagram ........................................................................................... 34
8.2 CS47028, 100-Pin LQFP Pinout Diagram ........................................................................................... 35
8.3 CS47024, 100-Pin LQFP Pinout Diagram ........................................................................................... 36
10.1 Dynamic Range ................................................................................................................................. 38
10.2 Total Harmonic Distortion + Noise ..................................................................................................... 38
10.3 Frequency Response ........................................................................................................................ 38
10.4 Interchannel Isolation ........................................................................................................................ 38
10.5 Interchannel Gain Mismatch .............................................................................................................. 38
10.6 Gain Error .......................................................................................................................................... 38
10.7 Gain Drift ........................................................................................................................................... 38
5.17.2 Analog Output Characteristics (Automotive) ........................................................................ 31
5.17.3 Combined DAC Interpolation & On-chip Analog Filter Response ........................................ 32
2
C Slave Mode Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2
C Master Mode Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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