cs43l43 Cirrus Logic, Inc., cs43l43 Datasheet - Page 15

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cs43l43

Manufacturer Part Number
cs43l43
Description
Low-voltage Stereo D/a Converter With Headphone Amplifier
Manufacturer
Cirrus Logic, Inc.
Datasheet

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5.0 REGISTER DESCRIPTIONS
5.1 POWER AND MUTING CONTROL (ADDRESS 01H)
DS479PP3
AMUTE
5.1.1 AUTO-MUTE (AMUTE)
5.1.2 SOFT RAMP AND ZERO CROSS CONTROL (SZC)
Function:
Function:
7
1
Immediate Change
Zero Cross Digital and Analog
Ramped Digital and Analog
Default = 1
0 - Disabled
1 - Enabled
The Digital-to-Analog converter output will mute following the reception of 8192 consecutive audio sam-
ples of static 0 or -1. A single sample of non-static data will release the mute. Detection and muting is
done independently for each channel. The quiescent voltage on the output will be retained. The muting
function is affected, similar to volume control changes, by the Soft and Zero Cross bits in the Power and
Muting Control register.
Default = 10
00 - Immediate Change
01 - Zero Cross Digital and Analog
10 - Ramped Digital and Analog
11 - Reserved
When Immediate Change is selected all level changes will take effect immediately in one step.
Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a
timeout period of 512 sample periods (10.7 ms at 48 kHz sample rate) if the signal does not encounter a
zero crossing. The zero cross function is independently monitored and implemented for each channel.
Soft Ramp allows digital level changes, both muting and attenuation, to be implemented by incrementally
ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1dB per 8 left/right clock pe-
riods. Analog level changes will occur in 1 dB steps on a signal zero crossing. The analog level change
will occur after a timeout period of 512 sample periods (10.7 ms at 48 kHz sample rate) if the signal does
not encounter a zero crossing. The zero cross function is independently monitored and implemented for
each channel.
NOTE: Ramped Digital and Analog is not available in Double-Speed mode.
SZC1
6
1
SZC0
5
0
BIT 7
POR
4
1
RESERVED
3
0
BIT 5-6
RESERVED
2
0
PDN
1
1
CS43L43
CP_EN
0
0
15

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