cs4344 Cirrus Logic, Inc., cs4344 Datasheet - Page 9
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cs4344
Manufacturer Part Number
cs4344
Description
10-pin, 24-bit, 192 Khz Stereo D/a Converters
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS4344.pdf
(24 pages)
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DS613F1
SWITCHING CHARACTERISTICS - SERIAL AUDIO INTERFACE
MCLK Frequency
MCLK Duty Cycle
Input Sample Rate
(Note 11)
External SCLK Mode
LRCK Duty Cycle (External SCLK only)
SCLK Pulse Width Low
SCLK Pulse Width High
SCLK Duty Cycle
SCLK rising to LRCK edge delay
SCLK rising to LRCK edge setup time
SDIN valid to SCLK rising setup time
SCLK rising to SDIN hold time
Internal SCLK Mode
LRCK Duty Cycle (Internal SCLK only)
SCLK Period
SCLK rising to LRCK edge
SDIN valid to SCLK rising setup time
SCLK rising to SDIN hold time
SCLK rising to SDIN hold time
11. Not all sample rates are supported for all clock ratios. See
12. In Internal SCLK Mode, the Duty Cycle must be 50% +/− 1/2 MCLK Period.
13. The SCLK / LRCK ratio may be either 32, 48, 64, or 72. This ratio depends on part type and
MCLK / LRCK =1152, 1024, 512, 256, 128, or 64
page 12
MCLK/LRCK ratio. (See
MCLK / LRCK = 768, 384, 192, or 96
for supported ratio’s and frequencies.
Parameters
All MCLK/LRCK ratios combined
Figures
256x, 384x, 1024x
256x, 384x
512x, 768x
128x, 192x
128x, 192x
7-9)
(Note 12)
(Note 13)
64x, 96x
1152x
Symbol
t
t
t
t
t
t
sclkw
sclkh
t
t
t
t
t
sdlrs
sclkr
sdlrs
sclkl
Fs
slrd
slrs
sdh
sdh
sdh
--------------------- -
(
--------------------- -
(
--------------------- -
(
512
512
384
10
10
10
--------------- -
SCLK
0.512
Min
10
)Fs
)Fs
)Fs
100
168
9
9
9
45
84
42
30
50
45
20
20
45
20
20
20
20
2
2
-
-
Table 1, “Common Clock Frequencies,” on
9
+
+
+
10
15
15
tsclkw
----------------- -
Typ
50
50
50
2
-
-
-
-
-
-
-
-
-
-
-
-
CS4344/5/6/8
Max
200
134
100
200
200
50
55
50
67
34
55
55
-
-
-
-
-
-
-
-
-
-
-
-
Units
MHz
kHz
kHz
kHz
kHz
kHz
kHz
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
%
%
%
%
9