cs4341 Cirrus Logic, Inc., cs4341 Datasheet - Page 18

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cs4341

Manufacturer Part Number
cs4341
Description
24-bit, 96 Khz Stereo Dac With Volume Control
Manufacturer
Cirrus Logic, Inc.
Datasheet

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4.2.2
4.3
The device will accept audio samples in several digital interface formats. The desired format is selected
via the DIF0, DIF1 and DIF2 bits in the Mode Control register (see section 6.2.2). For an illustration of the
required relationship between LRCK, SCLK and SDATA, see Figures 17 through 19.
18
SDATA
SDATA
SDATA
LR C K
S C L K
LRCK
SCLK
LR C K
S C L K
The device will enter the External Serial Clock Mode whenever 16 low to high transitions are de-
tected on the SCLK pin during any phase of the LRCK period. The device will revert to Internal
Serial Clock Mode if no low to high transitions are detected on the SCLK pin for 2 consecutive pe-
riods of LRCK.
LSB
Digital Interface Format
External Serial Clock Mode
512, 256, 128
512, 256, 128
MCLK/LRCK
384, 192
MSB
MSB
Ratio
Input
-1 -2 -3 -4 -5
-1 -2 -3 -4 -5
MSB
-1 -2 -3 -4 -5
Figure 18. CS4341 Format 2 - Left Justified up to 24-Bit Data
Left Channel
I
2
Figure 17. CS4341 Formats 0-1 - I²S up to 24-Bit Data
S up to 16 or
(Format 1)
(Format 0)
+5 +4
Left C ha nnel
24 Bits
Figure 19. CS4341 Formats 3-6 - Right Justified
Left C ha nnel
+5 +4
X
+3 +2 +1
+3 +2 +1
Table 4. Internal SCLK/LRCK Ratio
+7
+6 +5 +4 +3 +2 +1
Digital Interface Format Selection
Left Justified 24
LSB
LSB
Bits
X
X
-
LSB
18, 20 or 24 Bits
Right Justified
X
X
-
MSB
MSB
MSB
-1 -2 -3 -4
-1 -2 -3 -4
-1 -2 -3 -4 -5
Right Justified
R ight Cha nnel
16 Bits
X
X
-
+5 +4
+5 +4
R ig ht C ha nnel
R ig ht C ha nnel
+3 +2 +1
+3 +2 +1
+7
+6 +5 +4 +3 +2 +1
SCLK/LRCK
Internal
LSB
LSB
Ratio
32
48
64
CS4341
DS298F5
LSB

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