cs42324 Cirrus Logic, Inc., cs42324 Datasheet - Page 25

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cs42324

Manufacturer Part Number
cs42324
Description
10-in, 6-out, 2 Vrms Audio Codec
Manufacturer
Cirrus Logic, Inc.
Datasheet

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DS721A6
SWITCHING CHARACTERISTICS - SOFTWARE MODE - SPI FORMAT
Inputs: Logic ‘0’ = GND = GNDH = 0 V; Logic ‘1’ = VLC; C
Notes:
CCLK Clock Frequency
RST Rising Edge to CS Falling
CCLK Edge to CS Falling
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
Transition Time from CCLK to CDOUT Valid
Time from CS rising to CDOUT High-Z
20. t
21. Data must be held for sufficient time to bridge the transition time of CCLK.
22. For F
23. CDOUT should not be sampled during this time.
spi
only needed before first falling edge of CS after RST rising edge. t
SCK
CDOUT
CCLK
< 1 MHz.
CDIN
RST
CS
(Note 20)
Parameter
(Note 22)
(Note 22)
(Note 21)
t srs
t spi
Figure 6. Software Mode Timing - SPI Mode
t r2
t css
(Note 23)
t scdov
t scl
t f2
t dsu t
t sch
dh
L
t scdov
= 20 pF.
Symbol
f
t
t
t
t
t
t
t
t
sclk
dsu
csh
css
sch
t
t
t
t
srs
spi
scl
dh
r2
f2
r2
f2
spi
t cscdo
= 0 at all other times.
t csh
Min
500
500
1.0
20
66
66
40
15
-
-
-
-
-
Hi-Impedance
Max
100
100
100
100
6
-
-
-
-
-
-
-
-
CS42324
Unit
MHz
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
25

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