cs4228a Cirrus Logic, Inc., cs4228a Datasheet - Page 14
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cs4228a
Manufacturer Part Number
cs4228a
Description
24-bit, 96 Khz Surround Sound Codec
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS4228A.pdf
(32 pages)
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The high pass filters can be disabled by setting the
HPF bit in the ADC Control register. When assert-
ed, any DC present at the analog inputs will be rep-
resented in the ADC outputs. The high pass filter
may also be “frozen” using the HPFZ bit in the
ADC Control register. In this condition, it will re-
member the DC offset present at the ADC inputs at
the moment the HPFZ bit was asserted, and will
continue to remove this DC level from the ADC
outputs. This is useful in cases where it is desirable
to eliminate a fixed DC offset while still maintain-
ing full frequency response down to DC.
3.3
3.3.1
The CS4228A contains on-chip buffer amplifiers
capable of producing line level outputs. These am-
plifiers are biased to a quiescent DC level of ap-
proximately 2.3V. This bias, as well as variations
in offset voltage, are removed using off-chip AC
load coupling.
The delta-sigma conversion process produces high
frequency noise beyond the audio passband, most
of which is removed by the on-chip analog filters.
The remaining out-of-band noise can be attenuated
using an off-chip low pass filter. For most applica-
tions, a simple passive filter as shown in Figure 8
can be used. Note that this circuit also serves to
block the DC present at the outputs. Figure 9 gives
an example of a filter which can be used in applica-
tions where greater out of band attenuation is de-
sired. The 2-pole Butterworth filter has a -3 dB
frequency of 50 kHz, a passband attenuation of
0.1 dB at 20 kHz, providing optimal out-of-band
filtering for sample rates from 44.1 kHz to 96 kHz.
The filter has and a gain of 1.56, providing a
2 Vrms output signal.
3.3.2
Each DAC’s output level is controlled via the Dig-
ital Volume Control register operating over the
range of 0 to 90.5 dB attenuation with 0.5 dB reso-
14
Analog Outputs
Line Level Outputs
Digital Volume Control
lution. Volume control changes do not occur in-
stantaneously. Instead they ramp in increments of
0.125 dB at a variable rate controlled by the
RMP1:0 bits in the Digital Volume Control register.
Each output can be independently muted via mute
control bits MUT6-1 in the DAC Mute1 Control
register. When asserted, MUT attenuates the corre-
sponding DAC to its maximum value (90.5 dB).
When MUT is deasserted, the corresponding DAC
A
OUT
Figure 9. Butterworth Output Filter with Mute
3.57 k
Figure 8. Passive Output Filter with Mute
10 µ f
C=142µF
AOUT
3.57 k
+
MUTEC
F
GND
s
3.57 k
2-Pole Butterworth Filter
1 nf
+
22 µ F
1 nf
5
6
+
_
10 k
2SC2878
2SC3326
100 pf
100 k
2 k
MC33078
7
or
560
10 k
+
10 µ f
2.2 k
CS4228A
MUTE DRV
MUTE
MUTEDRV
MUN2IIIT1
C
Line Out
2 VRMS
Line
Out