BR23 Silicon Standard Corporation, BR23 Datasheet - Page 6

• Manufacturer Part Number: BR23
• Description: Reset Circuits With Manual Reset Input
• Manufacturer: Silicon Standard Corporation

Rev.1.01 4/06/2004
BLOCK DIAGRAM
PIN DESCRIPTIONS
DETAILED DESCRIPTIONS OF TECHNICAL TERMS
RESET OUTPUT
The microprocessor will be activated at a valid reset
state. These µ P supervisory circuits assert reset to
prevent code execution errors during power-up,
power-down, or brownout conditions.
V
threshold, an internal timer keeps RESET low for
the reset timeout period; after this interval, RESET
MR Pin
GND Pin
RESET Pin (SS812)
Vcc Pin
RESET is guaranteed to be a logic low for
RESET Pin (SS811)
TH
>VCC>0.9V. Once VCC exceeds the reset
GND
VCC
R1
R2
:
:
:
:
:
Bandgap
Ground.
pull-up resistor. It can be driven by a TTL or CMOS, or shorted to ground with a switch.
Leave open when unused.
Supply voltage.
Active high output pin. RESET output remains high while Vcc is below reset threshold.
Logic low manual reset input. This active -low input has an internal 20k
Active low output pin. RESET Output remains low while Vcc is below reset threshold.
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-
+
Reset Generator
goes high.
If a brownout condition occurs (VCC drops below the
reset threshold), RESET goes low. Any time VCC
goes below the reset threshold, the internal timer
resets to zero, and RESET goes low. The internal
timer is activated after VCC returns above the reset
threshold, and RESET remains low for the reset
timeout period.
The manual reset input ( MR ) can also initiate a
reset. The SS812 has an active-high RESET output
that is the inverse of the SS811’s RESET output.
R
20K
PULL_UP
SS811, SS812
RESET
(RESET)
MR
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