S25FL004A Meet Spansion Inc., S25FL004A Datasheet - Page 13

• Manufacturer Part Number: S25FL004A
• Description: 4-megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
• Manufacturer: Meet Spansion Inc.

7.6
July 9, 2007 S25FL004A_00_B3
Data Protection Modes
Spansion SPI Flash memory devices provide the following data protection methods:
BP2
The Write Enable (WREN) command: Must be written prior to any command that modifies data. The
WREN command sets the Write Enable Latch (WEL) bit. The WEL bit resets (disables writes) on power-up
or after the device completes the following commands:
Software Protected Mode (SPM): The Block Protect (BP2, BP1, BP0) bits define the section of the
memory array that can be read but not programmed or erased.
ranges of protected areas that are defined by Status Register bits BP2:BP0.
Hardware Protected Mode (HPM): The Write Protect (W#) input and the Status Register Write Disable
(SRWD) bit together provide write protection.
Clock Pulse Count: The device verifies that all program, erase, and Write Status Register commands
consist of a clock pulse count that is a multiple of eight before executing them.
0
0
0
0
1
1
1
1
– Page Program (PP)
– Sector Erase (SE)
– Bulk Erase (BE)
– Write Disable (WRDI)
– Write Status Register (WRSR)
Block Protect Bits
Status Register
BP1
0
0
1
1
0
0
1
1
BP0
0
1
0
1
0
1
0
1
D a t a
Address Range
70000–7FFFF
60000–7FFFF
40000–7FFFF
00000–7FFFF
00000–7FFFF
00000–7FFFF
00000–7FFFF
Protected
None
Table 7.1 S25FL004A Protected Area Sizes
S h e e t
S25FL004A
Protected Sectors
(2) SA7:SA6
(4) SA7:SA4
(8) SA7:SA0
(8) SA7:SA0
(8) SA7:SA0
(8) SA7:SA0
(1) SA7
(0)
Memory Array
Address Range
00000–7FFFF
00000–6FFFF
00000–5FFFF
00000–3FFFF
Unprotected
Table 7.1
none
none
none
none
shows the sizes and address
Unprotected
SA7:SA0
SA6:SA0
SA5:SA0
SA3:SA0
Sectors
None
None
None
None
Total Memory
Protected
Portion of
Area
1/8
1/4
1/2
All
All
All
All
0
13