S25FL064A Meet Spansion Inc., S25FL064A Datasheet - Page 18

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S25FL064A

Manufacturer Part Number
S25FL064A
Description
64 Megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
Manufacturer
Meet Spansion Inc.
Datasheet

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9.4
9.5
June 29, 2007 S25FL064A_00_C3
Write Enable (WREN)
Write Disable (WRDI)
The Write Enable (WREN) command (see
enables the device to accept a Write Status Register, program, or erase command. The WEL bit must be set
prior to every Page Program (PP), Erase (SE or BE) and Write Status Register (WRSR) command.
The host system must first drive CS# low, write the WREN command, and then drive CS# high.
The Write Disable (WRDI) command (see
disables the device from accepting a Write Status Register, program, or erase command. The host system
must first drive CS# low, write the WRDI command, and then drive CS# high.
Any of following conditions resets the WEL bit:
Power-up
Write Disable (WRDI) command completion
Write Status Register (WRSR) command completion
Page Program (PP) command completion
Sector Erase (SE) command completion
Bulk Erase (BE) command completion
CS#
SCK
SO
SI
Mode 3
Mode 0
D a t a
Hi-Z
Figure 9.4 Write Enable (WREN) Command Sequence
SCK
Figure 9.5 Write Disable (WRDI) Command Sequence
CS#
SO
SI
Mode 3
Mode 0
Hi-Z
S h e e t
0 1
S25FL064A
Figure
Figure
2 3
0 1 2 3 4 5 6 7
Command
4 5 6 7
9.5) resets the Write Enable Latch (WEL) bit to a 0, which
9.4) sets the Write Enable Latch (WEL) bit to a 1, which
Command
19

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