SST25VF040 Silicon Storage Technology, Inc., SST25VF040 Datasheet - Page 4

• Manufacturer Part Number: SST25VF040
• Description: 2 Mbit / 4 Mbit Spi Serial Flash
• Manufacturer: Silicon Storage Technology, Inc.

EOL Product Data Sheet
PRODUCT IDENTIFICATION
TABLE 2: Product Identification
MEMORY ORGANIZATION
The SST25VF040 SuperFlash memory array is organized
in 4 KByte sectors with 32 KByte overlay blocks.
©2006 Silicon Storage Technology, Inc.
Manufacturer’s ID
Device ID
FIGURE 3: SPI Protocol
SST25VF040
SCK
CE#
SO
SI
MODE 3
MODE 0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
HIGH IMPEDANCE
Address
00000H
00001H
T2.0 1231(04)
Data
BFH
44H
4
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
DEVICE OPERATION
The SST25VF040 is accessed through the SPI (Serial
Peripheral Interface) bus compatible protocol. The SPI bus
consist of four control lines; Chip Enable (CE#) is used to
select the device, and data is accessed through the Serial
Data Input (SI), Serial Data Output (SO), and Serial Clock
(SCK).
The SST25VF040 supports both Mode 0 (0,0) and Mode 3
(1,1) of SPI bus operations. The difference between the
two modes, as shown in Figure 3, is the state of the SCK
signal when the bus master is in Stand-by mode and no
data is being transferred. The SCK signal is low for Mode 0
and SCK signal is high for Mode 3. For both modes, the
Serial Data In (SI) is sampled at the rising edge of the SCK
clock signal and the Serial Data Output (SO) is driven after
the falling edge of the SCK clock signal.
2 Mbit / 4 Mbit SPI Serial Flash
DON'T CARE
MODE 3
MODE 0
1231 F02.1
SST25VF040
S71231(04)-00-000
10/06