SST25VF064C Silicon Storage Technology, Inc., SST25VF064C Datasheet - Page 3

no-image

SST25VF064C

Manufacturer Part Number
SST25VF064C
Description
64 Mbit Spi Serial Dual I/o Flash
Manufacturer
Silicon Storage Technology, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SST25VF064C-80-4C-Q2AE
Manufacturer:
FSC
Quantity:
1 200
Part Number:
SST25VF064C-80-4I-Q2AE
Manufacturer:
SST
Quantity:
2 100
Part Number:
SST25VF064C-80-4I-Q2AE-T
Manufacturer:
SANEKN
Quantity:
430
Company:
Part Number:
SST25VF064C-80-4I-Q2AE-T
Quantity:
124
Company:
Part Number:
SST25VF064C-80-4I-Q2AE-T
Quantity:
42
Part Number:
SST25VF064C-80-4I-S3AE
Manufacturer:
Schneider
Quantity:
20
Part Number:
SST25VF064C-80-4I-SCE
Manufacturer:
OMRON
Quantity:
12 000
Part Number:
SST25VF064C-80-4I-SCE
Manufacturer:
SST
Quantity:
20 000
Part Number:
SST25VF064C-804IQ2AE
Manufacturer:
SST
Quantity:
20 000
64 Mbit SPI Serial Dual I/O Flash
SST25VF064C
PIN DESCRIPTION
TABLE 1: Pin Description
©2009 Silicon Storage Technology, Inc.
Symbol
SCK
SI
SO
SIO[0:1]
CE#
WP#
RST#/HOLD#
V
V
DD
SS
FIGURE 2: Pin Assignments for 16-Lead SOIC and 8-Contact WSON
RST#/HOLD#
SO/SIO
V
CE#
NC
NC
NC
NC
Pin Name
Serial Clock
Serial Data Input
Serial Data Output
Serial Data Input/
Output for Dual I/O
Mode
Chip Enable
Write Protect
Reset
Hold
Power Supply
Ground
DD
1
Top View
Functions
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock
input, while output data is shifted out on the falling edge of the clock input.
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
To transfer commands, addresses, or data serially into the device, or data out of the
device.
Inputs are latched on the rising edge of the serial clock.
Data is shifted out on the falling edge of the serial clock. These pins are for Dual I/O
mode.
The device is enabled by a high to low transition on CE#. CE# must remain low for
the duration of any command sequence.
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.
To reset the operation of the device and the internal logic. The device powers on with
RST# pin functionality as default.
To temporarily stop serial communication with SPI Flash memory while device is
selected. This is selected by an instruction sequence. See “Reset/Hold Mode” page 5
for details.
To provide power supply voltage: 2.7-3.6V
1392 16-SOIC P1.0
SCK
SI/SIO
NC
NC
NC
NC
V
WP#
SS
0
3
SO/SIO
WP#
V SS
CE#
1
1
2
3
4
Top View
8
7
6
5
1392 8-WSON P1.0
V DD
RST#/HOLD#
SCK
SI/SIO
S71392-01-000
0
Data Sheet
T1.0 1392
4/09

Related parts for SST25VF064C