isl6566a Intersil Corporation, isl6566a Datasheet
isl6566a
Related parts for isl6566a
isl6566a Summary of contents
Page 1
... Ld 6x6 QFN ISL6566AIRZ (Note) - 6x6 QFN (Pb-free) L40.6x6 ISL6566AIRZA (Note) - 6x6 QFN (Pb-free) L40.6x6 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
Page 2
... OVP OVP V OVP +150mV x 0.82 VID4 VID3 VID2 DYNAMIC VID VID1 D/A VID0 VID12.5 VRM10 REF E/A FB COMP OFS OFFSET 2 ISL6566A ISL6566A PGOOD 100µA OC +1V SOFT-START AND FAULT LOGIC 0.2V CLOCK AND SAWTOOTH GENERATOR ∑ PWM1 ∑ PWM2 ∑ PWM3 CHANNEL 1 CURRENT N BALANCE ∑ ...
Page 3
... Typical Application - ISL6566A FB VDIFF VSEN RGND +5V VCC OFS FS REF ISL6566A VID4 VID3 VID2 VID1 VID0 VID12.5 VRM10 PGOOD +12V GND ENLL IREF OCSET ICOMP ISUM 3 ISL6566A ISL6566A +12V COMP PVCC1 BOOT1 UGATE1 PHASE1 ISEN1 LGATE1 +12V PVCC2 BOOT2 UGATE2 PHASE2 ISEN2 ...
Page 4
... Typical Application - ISL6566A with NTC Thermal Compensation FB VDIFF VSEN RGND +5V VCC OFS FS REF ISL6566A VID4 VID3 VID2 VID1 VID0 VID12.5 VRM10 PGOOD +12V GND ENLL IREF OCSET ICOMP 4 ISL6566A ISL6566A +12V COMP PVCC1 BOOT1 UGATE1 PHASE1 ISEN1 LGATE1 +12V PVCC2 BOOT2 ...
Page 5
... VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5% PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V ±5% Ambient Temperature (ISL6566ACR, ISL6566ACRZ 0°C to 70°C Ambient Temperature (ISL6566AIR, ISL6566AIRZ) . .-40°C to 85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...
Page 6
... Lower Drive Source Resistance Lower Drive Sink Resistance OVER TEMPERATURE SHUTDOWN Thermal Shutdown Setpoint (Note 3) Thermal Recovery Setpoint (Note 3) NOTE: 3. Parameter magnitude guaranteed by design. Not 100% tested. 6 ISL6566A ISL6566A TEST CONDITIONS R = 30kΩ from OFS to VCC OFS R = 10kΩ from OFS to GND OFS R ...
Page 7
... These are the inputs for the internal DAC that provides the reference voltage for output regulation. These pins respond to TTL logic thresholds. The ISL6566A decodes the VID inputs to establish the output voltage; see VID Tables for correspondence between DAC codes and output voltage settings. These pins are internally pulled high, to approximately 1.2V, by 40µ ...
Page 8
... The ISL6566A controller helps simplify implementation by integrating vital functions and requiring minimal external components. The block diagram on page 2 provides a top level view of multi-phase power conversion using the ISL6566A controller ...
Page 9
... PWM Operation The timing of each converter leg is set by the number of active channels. The default channel setting for the ISL6566A is three. One switching cycle is defined as the time between the internal PWM1 pulse termination signals. The pulse termination signal is the internally generated clock signal that triggers the falling edge of PWM1 ...
Page 10
... The sampled current is used only for channel-current balance The ISL6566A supports MOSFET r to sample each channel’s current for channel-current balance. The internal circuitry, shown in Figure 5 represents PWM1 TO GATE channel N-channel converter. This circuitry is ...
Page 11
... SENSING CIRCUITRY FOR CURRENT BALANCE The ISL6566A senses the channel load current by sampling the voltage across the lower MOSFET r Figure 5. A ground-referenced operational amplifier, internal to the ISL6566A, is connected to the PHASE node through a resistor The voltage across R ISEN the voltage drop across the r ...
Page 12
... ISL6566A ISL6566A TABLE 4. VRM10 VOLTAGE IDENTIFICATION CODES (Continued) VID0 VDAC VID4 0 1.200 0 1 1.225 0 0 1.250 0 1 1.275 0 0 1.300 0 1 1.325 0 0 1.350 0 1 1.375 0 0 1.400 ...
Page 13
... DAC) and offset errors in the OFS current source, remote-sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6566A to include the combined tolerances of each of these elements. EXTERNAL CIRCUIT ISL6566A INTERNAL CIRCUIT ...
Page 14
... Note: An optional 10nF ceramic capacitor from the ISUM pin to the IREF pin is recommended to help reduce any noise affects on the current sense amplifier due to layout. Output-Voltage Offset Programming (EQ. 6) The ISL6566A allows the designer to accurately adjust the offset voltage by connecting a resistor, R ⋅ DCR ⋅ ...
Page 15
... VID change. When in VRM10 mode the ISL6566A checks the VID inputs six times every switching cycle new code is established and it stays the same for 3 consecutive readings, the ISL6566A recognizes the change and increments the reference. Specific to VRM10, the processor controls the VID transitions and is responsible for incrementing or decrementing one VID step at a time ...
Page 16
... ISL6566A is guaranteed. Hysteresis between the (EQ. 12) rising and falling thresholds assure that once enabled, the ISL6566A will not inadvertently turn off unless the bias voltage drops substantially (see Electrical Specifications). is the number of term is defined as the FIGURE 11 ...
Page 17
... V is the DAC-set VID voltage, and f DAC switching frequency. The ISL6566A also has the ability to start up into a pre- charged output, without causing any unnecessary disturbance. The FB pin is monitored during soft-start, and should it be higher than the equivalent internal ramping reference voltage, the output drives hold both MOSFETs off. ...
Page 18
... The LGATE outputs remain high and PWM3 remains low until VDIFF falls to within the overvoltage limits explained above. The ISL6566A will continue to protect the load in this fashion as long as the overvoltage condition recurs. Once an overvoltage condition ends the ISL6566A continues normal operation and PGOOD returns high ...
Page 19
... LOWER MOSFET POWER CALCULATION The calculation for power loss in the lower MOSFET is simple, since virtually all of the loss in the lower MOSFET is 19 ISL6566A due to current conducted through the channel resistance ( Equation 15, I DS(ON) ...
Page 20
... MOSFET data sheet; I quiescent current with no load at both drive outputs; N and N Q2 phase, respectively; N being controlled by the internal ISL6566A drivers (can not be greater then 2). The I of the controller without capacitive load and is typically 75mW at 300kHz. PVCC FIGURE 15. TYPICAL UPPER-GATE DRIVE TURN-ON PATH PVCC FIGURE 16 ...
Page 21
... GI2 R + ------------- For accurate load line regulation, the ISL6566A senses the total output current by detecting the voltage across the output inductor DCR of each channel (As described in the Load Line Regulation section). As Figure 18 illustrates, an R-C network is required to accurately sense the inductor , as shown in DS(ON) DCR voltage and convert this information into a “droop” ...
Page 22
... Select a target bandwidth for the compensated system, f The target bandwidth must be large enough to assure adequate transient performance, but smaller than 1/3 of the ∆V ∆V 1 ∆I and (OPTIONAL COMP VDIFF LOAD-LINE REGULATED ISL6566A CIRCUIT 2 V OUT I TRAN ISL6566A . 0 FN9200.2 July 27, 2005 ...
Page 23
... The output filter also must provide the transient energy until the regulator can 23 ISL6566A respond. Because it has a low bandwidth compared to the switching frequency, the output filter limits the system 0 transient response ...
Page 24
... The input capacitors are responsible for sourcing the ac component of the input current flowing into the upper MOSFETs. Their RMS current capacity must be sufficient to 24 ISL6566A handle the ac component of the current drawn by the upper MOSFETs which is related to duty cycle and the number of active phases. ...
Page 25
... Symmetrical layout allows heat to be dissipated equally across all three power trains. Equidistant placement of the 25 ISL6566A controller to the three power trains also helps keep the gate drive traces equally short, resulting in equal trace impedances and similar drive capability of all sets of MOSFETs. ...
Page 26
... Worst-case leakage currents are on the order of pico-amps; therefore, a 10kΩ resistor, connected from UGATE to PHASE, is more than sufficient to bleed off any stray leakage current. This resistor will not affect the normal performance of the driver or reduce its efficiency. 26 ISL6566A FN9200.2 July 27, 2005 ...
Page 27
... VID12.5 VRM10 PGOOD +12V GND ENLL IREF OCSET ICOMP ISUM R COMP R OCSET C COMP FIGURE 25. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS 27 ISL6566A LOCATE CLOSE TO IC (MINIMIZE CONNECTION PATH) +12V COMP PVCC1 (CF2) BOOT1 C BOOT1 UGATE1 PHASE1 ISEN1 R ISEN1 LGATE1 +12V PVCC2 ...
Page 28
... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 28 ISL6566A L40.6x6 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VJJD-2 ISSUE C) ...