isl6556b Intersil Corporation, isl6556b Datasheet - Page 14

• Manufacturer Part Number: isl6556b
• Description: Optimized Multiphase Pwm Controller With 6-bit Dac And Programmable Internal Temperature Compensation For Vr10.x Application
• Manufacturer: Intersil Corporation

The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
As shown in Figure 5, a current proportional to the average
current in all active channels, I
load-line regulation resistor, R
across R
creating an output voltage droop with a steady-state value
defined as
In most cases, each channel uses the same R
sense current. A more complete expression for V
derived by combining equations 4 and 5.
Output-Voltage Offset Programming
The ISL6556B allows the designer to accurately adjust the
offset voltage. When a resistor, R
OFS and VCC, the voltage across it is regulated to 2.0V. This
causes a proportional current (I
is connected to ground, the voltage across it is regulated to
0.5V, and I
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (I
R
As evident in Figure 7, the OFSOUT pin must be connected
to the FB pin for this current injection to function in
ISL6556BCR. The current flow through R
at the REF pin, which is ultimately duplicated at the output of
the regulator.
Once the desired output offset voltage has been determined,
use the following formulas to set R
For Positive Offset (connect R
For Negative Offset (connect R
V
V
R
R
DROOP
FB
DROOP
OFS
OFS
). These functions are shown in Figures 6 and 7.
=
=
FB
--------------------------
V
--------------------------
V
0.5 R
=
=
2
OFFSET
OFFSET
OFS
×
I
------------ -
is proportional to the output current, effectively
I
×
OUT
AVG
R
N
FB
flows out of OFS. The offset current flowing
FB
R
r
---------------------- R
DS ON
R
FB
ISEN
(
)
FB
14
FB
OFS
AVG
OFS
OFS
. The resulting voltage drop
OFS
, flows from FB through a
OFS
) to flow into OFS. If R
to GND):
to VCC):
, is connected between
:
FB
creates an offset
ISEN
DROOP
value to
OFS
(EQ. 5)
(EQ. 6)
(EQ. 7)
(EQ. 8)
OFS
is
x
ISL6556B
Dynamic VID
Modern microprocessors need to make changes to their core
voltage as part of normal operation. They direct the core-
voltage regulator to do this by making changes to the VID
inputs during regulator operation. The power management
solution is required to monitor the DAC inputs and respond to
R
R
OFSOUT
R
OFS
R
FIGURE 6. OUTPUT VOLTAGE OFFSET PROGRAMMING
OFS
FIGURE 7. OUTPUT VOLTAGE OFFSET PROGRAMMING
FB
FB
FB
VDIFF
GND
VCC
VDIFF
GND
VCC
OR
OFS
OR
OFS
FB
ISL6556BCB
ISL6556BCR
WITH ISL6556BCB (28-LEAD SOIC)
WITH ISL6556BCR (32-LEAD QFN)
DYNAMIC
DYNAMIC
VID D/A
VID D/A
GND
GND
+
-
+
-
E/A
0.5V
E/A
0.5V
VCC
VCC
+
-
+
-
December 28, 2004
2.0V
2.0V
FN9097.4