isl6263c Intersil Corporation, isl6263c Datasheet - Page 12

• Manufacturer Part Number: isl6263c
• Description: 5-bit Vid Single-phase Voltage Regulator With Current Monitor For Gpu Core Power
• Manufacturer: Intersil Corporation

For example, choose V
can use a 8.06kΩ resistor, according to Equation 2.
UVP and OVP are independent of the OCP. If the output
voltage measured on the VO pin is less than +300mV below
the voltage on the SOFT pin for longer than 1ms, the
controller will latch a UVP fault. If the output voltage
measured on the VO pin is >195mV above the voltage on
the SOFT pin for longer than 1ms, the controller will latch an
OVP fault. Keep in mind that V
level commanded by the VID states only after the soft-start
capacitor C
The UVP and OVP detection circuits act on static and
dynamic V
When an OCP, OVP, or UVP fault has been latched, PGOOD
becomes a low impedance and the gate driver outputs
UGATE and LGATE are pulled low. The energy stored in the
inductor is dissipated as current flows through the low-side
MOSFET body diode. The controller will remain latched in
the fault state until the VR_ON pin has been pulled below the
falling VR_ON threshold voltage V
gone below the falling POR threshold voltage
A severe-overvoltage protection fault occurs immediately after
the voltage between the VO and VSS pins exceed the rising
severe-overvoltage threshold V
same reference voltage used by the VID DAC. The ISL6263C
will latch UGATE and PGOOD low but unlike other protective
faults, LGATE remains high until the voltage between VO and
VSS falls below approximately 0.77V, at which time LGATE is
pulled low. The LGATE pin will continue to switch high and low
at 1.545V and 0.77V until VDD has gone below the falling
POR threshold voltage
protection against a shorted high-side MOSFET while
preventing the output voltage from ringing below ground. The
severe-overvoltage fault circuit can be triggered after another
fault has already been latched.
Overcurrent
Short Circuit
Overvoltage
(+195mV)
between VO pin
and SOFT pin
FAULT TYPE
TABLE 3. FAULT PROTECTION SUMMARY OF
SOFT
SOFT
ISL6263C
voltage.
PROTECTION
has slewed to the VID DAC output voltage.
DURATION
PRIOR TO
FAULT
120µs
<2µs
1ms
V
ICOMP(max)
VDD_THF.
12
SOFT
OVPS
LGATE, UGATE, and
PGOOD latched low
LGATE, UGATE, and
PGOOD latched low
LGATE, UGATE, and
PGOOD latched low
PROTECTION
VR_ONL
This provides maximum
- V
ACTIONS
will equal the voltage
which is 1.545V, the
O
= 80mV. R
or until VDD has
V
VDD_THF
Cycle
VR_ON or
VDD
Cycle
VR_ON or
VDD
Cycle
VR_ON or
VDD
OCSET
RESET
FAULT
.
ISL6263C
Gate-Driver Outputs LGATE and UGATE
The ISL6263C has internal high-side and low-side
N-Channel MOSFET gate-drivers. The LGATE driver is
optimized for low duty-cycle applications where the low-side
MOSFET conduction losses are dominant. The LGATE
pull-down resistance is very low in order to clamp the
gate-source voltage of the MOSFET below the V
turn-off. The current transient through the low-side gate at
turn-off can be considerable due to the characteristic large
switching charge of a low r
Adaptive shoot-through protection prevents the gate-driver
outputs from going high until the opposite gate-driver output
has fallen below approximately 1V. The UGATE turn-on
propagation delay t
delay t
on page 6. The power for the LGATE gate-driver is sourced
directly from the PVCC pin. The power for the UGATE
gate-driver is sourced from a boot-strap capacitor connected
across the BOOT and PHASE pins. The boot capacitor is
charged from PVCC through an internal boot-strap diode
each time the low-side MOSFET turns on, pulling the
PHASE pin low.
Severe
Overvoltage
(+1.55V)
between VO pin
and VSS pin
Undervoltage
(-300mV)
between VO pin
and SOFT pin
FAULT TYPE
TABLE 3. FAULT PROTECTION SUMMARY OF
LGATE
UGATE
PWM
PDRL
FIGURE 6. GATE DRIVER TIMING DIAGRAM
t
ISL6263C (Continued)
are found in the “Electrical Specifications” table
PDRU
PROTECTION
Immediately UGATE, and
DURATION
PRIOR TO
PDRU
FAULT
1ms
and LGATE turn-on propagation
DS(ON)
t
PDRL
PGOOD latched low,
LGATE toggles ON
when VO > 1.55V
OFF when
VO < 0.77V
until fault reset
LGATE, UGATE, and
PGOOD latched low
PROTECTION
MOSFET.
ACTIONS
GS(th)
Cycle
VDD only
Cycle
VR_ON or
VDD
July 31, 2008
RESET
FAULT
FN6745.0
1V
1V
at