isl9105 Intersil Corporation, isl9105 Datasheet - Page 3

• Manufacturer Part Number: isl9105
• Description: 600ma Low Quiescent Current 1.6mhz High Efficiency Synchronous Buck Regulator
• Manufacturer: Intersil Corporation

Electrical Specifications
Pin Descriptions
VIN
Input supply voltage. Connect a 10μF ceramic capacitor to
power ground.
EN
Regulator enable pin. Enable the output when driven to high.
Shutdown the chip and discharge output capacitor when
driven to low. Do not leave this pin floating.
POR
216ms timer output. At power-up or EN HI, this output is a
216ms delayed Power-Good signal for the output voltage.
This output can be reset by a low RSI signal. 216ms starts
when RSI goes to high.
MODE
Mode Selection pin. Connect to logic high or input voltage
VIN for low IQ mode; connect to logic low or ground for
forced PWM mode. Do not leave this pin floating.
Minimum Supply Voltage for Valid POR Signal
Internal PGOOD Low Rising Threshold
Internal PGOOD Low Falling Threshold
Internal PGOOD High Rising Threshold
Internal PGOOD High Falling Threshold
Internal PGOOD Delay Time
EN, MODE, RSI
Logic Input Low
Logic Input High
Logic Input Leakage Current
Thermal Shutdown
Thermal Shutdown Hysteresis
PARAMETER
3
Unless otherwise noted, all parameter limits are guaranteed over the recommended operating conditions and the
typical specification are measured at the following conditions: T
L = 3.3μH, C1 = 10μF, C2 = 10μF, I
SYMBOL
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Pulled up to 5.5V
ISL9105
OUT
TEST CONDITIONS
= 0A (see the Typical Application Circuit). (Continued)
PHASE
Switching node connection. Connect to one terminal of
inductor.
GND
System ground.
FB
Buck regulator output feedback. Connect to the output
through a voltage divider resistor.
RSI
This input resets the 216ms timer. When the output voltage is
within the PGOOD window, an internal timer is started and
generates a POR signal 216ms later when RSI is low. A high
RSI resets POR and RSI high to low transition restarts the
internal counter if the output voltage is within the window,
otherwise the counter is reset by the output voltage condition.
Exposed Pad
The exposed pad must be connected to the GND pin for
proper electrical performance. The exposed pad must also
be connected to as much as possible for optimal thermal
performance.
A
= +25°C, V
105.5
IN
89.5
MIN
102
1.2
1.4
85
-
-
-
-
-
= 3.6V, EN = V
TYP
108
105
150
0.1
92
88
64
25
-
-
-
IN
, RSI = MODE = 0V,
110.5
MAX
94.5
108
0.4
91
1
-
-
-
-
-
February 13, 2007
UNITS
FN6415.1
μA
°C
°C
μs
%
%
%
%
V
V
V