isl22323 Intersil Corporation, isl22323 Datasheet - Page 7

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isl22323

Manufacturer Part Number
isl22323
Description
Dual Digitally Controlled Potentiometer Xdcp? , Low Noise, Low Power, I2c? Bus, 256 Taps
Manufacturer
Intersil Corporation
Datasheet

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Operating Specifications
EEPROM SPECIFICATION
SERIAL INTERFACE SPECS
Hysteresis
SYMBOL
(Note 19)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
t
t
t
t
t
t
HD:DAT
SU:STO
HD:STO
SU:STA
HD:STA
SU:DAT
t
t
Cpin
f
t
HIGH
V
t
LOW
V
BUF
t
V
SCL
t
WC
t
AA
DH
t
t
sp
OL
R
IH
F
IL
EEPROM Endurance
EEPROM Retention
Non-volatile Write cycle time
A1, A0, SDA, and SCL input buffer
LOW voltage
A1, A0, SDA, and SCL input buffer
HIGH voltage
SDA and SCL input buffer hysteresis
SDA output buffer LOW voltage,
sinking 4mA
A1, A0, SDA, and SCL pin
capacitance
SCL frequency
Pulse width suppression time at SDA
and SCL inputs
SCL falling edge to SDA output data
valid
Time the bus must be free before the
start of a new transmission
Clock LOW time
Clock HIGH time
START condition setup time
START condition hold time
Input data setup time
Input data hold time
STOP condition setup time
STOP condition hold time for read, or
volatile only write
Output data hold time
SDA and SCL rise time
SDA and SCL fall time
PARAMETER
7
Over the recommended operating conditions unless otherwise specified. (Continued)
Temperature T ≤ +55°C
Any pulse narrower than the max spec is
suppressed
SCL falling edge crossing 30% of V
SDA exits the 30% to 70% of V
SDA crossing 70% of V
condition, to SDA crossing 70% of V
during the following START condition
Measured at the 30% of V
Measured at the 70% of V
SCL rising edge to SDA falling edge; both
crossing 70% of V
From SDA falling edge crossing 30% of V
to SCL falling edge crossing 70% of V
From SDA exiting the 30% to 70% of V
window, to SCL rising edge crossing 30% of
V
From SCL rising edge crossing 70% of V
to SDA entering the 30% to 70% of V
window
From SCL rising edge crossing 70% of V
to SDA rising edge crossing 30% of V
From SDA rising edge to SCL falling edge;
both crossing 70% of V
From SCL falling edge crossing 30% of V
until SDA enters the 30% to 70% of V
window
From 30% to 70% of V
From 70% to 30% of V
CC
ISL22323
TEST CONDITIONS
CC
CC
CC
CC
CC
CC
CC
during a STOP
crossing
crossing
CC
window
CC
CC
CC
CC
CC
CC
, until
CC
CC
CC
CC
CC
,
,
1,000,000
0.7*V
0.1 * Cb
0.1 * Cb
0.05*
1300
1300
1300
V
20 +
20 +
MIN
600
600
600
100
600
50
CC
0
0
0
CC
(NOTE 4)
TYP
12
0.3*V
MAX
400
900
250
250
0.4
20
10
50
CC
May 31, 2007
Cycles
Years
UNIT
FN6422.0
kHz
ms
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V

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